R8M(JM$rockchip,rk3128-evbrockchip,rk3128 +!7Rockchip RK3128 Evaluation boardaliases=/pinctrl/gpio@2007c000C/pinctrl/gpio@20080000I/pinctrl/gpio@20084000O/pinctrl/gpio@20088000U/i2c@20072000Z/i2c@20056000_/i2c@2005a000d/i2c@2005e000i/serial@20060000q/serial@20064000y/serial@20068000/mmc@1021c000arm-pmuarm,cortex-a7-pmu0LMNOcpus+rockchip,rk3036-smpcpu@f00cpuarm,cortex-a7@cpu@f01cpuarm,cortex-a7cpu@f02cpuarm,cortex-a7cpu@f03cpuarm,cortex-a7opp-table-0operating-points-v2 opp-216000000  ~~7opp-408000000Q ~~7opp-600000000#F ~~7opp-696000000)| 7opp-8160000000, g8g87)opp-1008000000< OO7opp-1200000000G 777opp-table-1operating-points-v2opp-200000000  opp-300000000 opp-400000000ׄ 00opp-4800000008 timerarm,armv7-timer0   5Yn6oscillator fixed-clockYn6ixin24m| sram@10080000 mmio-sram +  smp-sram@0rockchip,rk3066-smp-sramgpu@10090000"rockchip,rk3128-maliarm,mali-400 Hgpgpmmupp0ppmmu0pp1ppmmu1 buscorex  disabledsyscon@100a0000&rockchip,rk3128-pmusysconsimple-mfd power-controller!rockchip,rk3128-power-controller+ power-domain@1Ez power-domain@2(power-domain@3qos@1012d000rockchip,rk3128-qossyscon qos@1012e000rockchip,rk3128-qossyscon qos@1012f000rockchip,rk3128-qossyscon  qos@1012f080rockchip,rk3128-qossyscon  qos@1012f100rockchip,rk3128-qossyscon  qos@1012f180rockchip,rk3128-qossyscon  qos@1012f200rockchip,rk3128-qossyscon interrupt-controller@10139000arm,cortex-a7-gic     usb@101800002rockchip,rk3128-usbrockchip,rk3066-usbsnps,dwc2 otgotg +@ : ?usb2-phyokayIusb@101c0000 generic-ehci :?usbokayusb@101e0000 generic-ohci :?usbokaymmc@102140000rockchip,rk3128-dw-mshcrockchip,rk3288-dw-mshc!@@  Drvbiuciuciu-driveciu-sampleU Zrx-txdoрQ}reset disabledmmc@102180000rockchip,rk3128-dw-mshcrockchip,rk3288-dw-mshc!@  Eswbiuciuciu-driveciu-sampleU Zrx-txdoрR}reset disabledmmc@1021c0000rockchip,rk3128-dw-mshcrockchip,rk3288-dw-mshc!@  Guybiuciuciu-driveciu-sampleU Zrx-txdoрS}resetokaydefault nand-controller@10500000(rockchip,rk3128-nfcrockchip,rk2928-nfcP@ Cahbnfcdefault  disabledclock-controller@20000000rockchip,rk3128-cru  xin24m!|#gsyscon@20008000&rockchip,rk3128-grfsysconsimple-mfd +!usb2phy@17crockchip,rk3128-usb2phy| phyclk iusb480m_phy"|okay"host-port 5 linestateokayotg-port$#34otg-bvalidotg-idlinestateokaytimer@20044000,rockchip,rk3128-timerrockchip,rk3288-timer @  aU pclktimertimer@20044020,rockchip,rk3128-timerrockchip,rk3288-timer @  aV pclktimertimer@20044040,rockchip,rk3128-timerrockchip,rk3288-timer @@  ;aW pclktimertimer@20044060,rockchip,rk3128-timerrockchip,rk3288-timer @`  <aX pclktimertimer@20044080,rockchip,rk3128-timerrockchip,rk3288-timer @  =aY pclktimertimer@200440a0,rockchip,rk3128-timerrockchip,rk3288-timer @  >aZ pclktimerwatchdog@2004c000 rockchip,rk3128-wdtsnps,dw-wdt  "? disabledpwm@20050000(rockchip,rk3128-pwmrockchip,rk3288-pwm ^default#  disabledpwm@20050010(rockchip,rk3128-pwmrockchip,rk3288-pwm ^default$  disabledpwm@20050020(rockchip,rk3128-pwmrockchip,rk3288-pwm  ^default%  disabledpwm@20050030(rockchip,rk3128-pwmrockchip,rk3288-pwm 0^default&  disabledi2c@20056000(rockchip,rk3128-i2crockchip,rk3288-i2c ` i2cMdefault'+okayrtc@51haoyu,hym8563Q|ixin32ki2c@2005a000(rockchip,rk3128-i2crockchip,rk3288-i2c  i2cNdefault(+ disabledi2c@2005e000(rockchip,rk3128-i2crockchip,rk3288-i2c  i2cOdefault)+ disabledserial@20060000&rockchip,rk3128-uartsnps,dw-apb-uart  Yn6MUbaudclkapb_pclkUZtxrxdefault *+,$ disabledserial@20064000&rockchip,rk3128-uartsnps,dw-apb-uart @ Yn6NVbaudclkapb_pclkUZtxrxdefault-$ disabledserial@20068000&rockchip,rk3128-uartsnps,dw-apb-uart  Yn6OWbaudclkapb_pclkUZtxrxdefault.$ disabledsaradc@2006c000rockchip,saradc  [>saradcapb_pclkW }saradc-apb. disabledi2c@20072000(rockchip,rk3128-i2crockchip,rk3288-i2c   i2cLdefault/+ disabledspi@20074000(rockchip,rk3128-spirockchip,rk3066-spi @ ARspiclkapb_pclkU Ztxrxdefault01234+ disableddma-controller@20078000arm,pl330arm,primecell @@[ apb_pclkrethernet@2008c000rockchip,rk3128-gmac @89macirqeth_wake_irq8~oMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac8 }stmmaceth!} disabledmdiosnps,dwmac-mdio+pinctrlrockchip,rk3128-pinctrl!+gpio@2007c000rockchip,gpio-bank  $@7gpio@20080000rockchip,gpio-bank  %Agpio@20084000rockchip,gpio-bank @ &B9gpio@20088000rockchip,gpio-bank  'Cpcfg-pull-default6pcfg-pull-none5emmcemmc-clk5emmc-cmd6emmc-cmd16emmc-pwr6emmc-bus16emmc-bus4@6666emmc-bus866666666gmacrgmii-pins6 6 6 6 66666666666rmii-pins6 6 66666666hdmihdmii2c-xfer 55hdmi-hpd5hdmi-cec5i2c0i2c0-xfer 55/i2c1i2c1-xfer 55'i2c2i2c2-xfer 55(i2c3i2c3-xfer 55)i2si2s-bus`5 5 5 5 55i2s1-bus`555555lcdclcdc-dclk5lcdc-den 5lcdc-hsync 5lcdc-vsync 5lcdc-rgb24 5 5555555555555nfcflash-ale5flash-cle5flash-wrn5flash-rdn5flash-rdy5flash-cs05flash-dqs5flash-bus855555555pwm0pwm0-pin5#pwm1pwm1-pin5$pwm2pwm2-pin5%pwm3pwm3-pin5&sdiosdio-clk5sdio-cmd6sdio-pwren6sdio-bus4@6666sdmmcsdmmc-clk5sdmmc-cmd6sdmmc-det6sdmmc-wp6sdmmc-pwren6sdmmc-bus4@6666spdifspdif-tx5spi0spi0-clk62spi0-cs0 63spi0-tx 60spi0-rx 61spi0-cs1 64spi1-clk6spi1-cs06spi1-tx6spi1-rx6spi1-cs16spi2-clk 6spi2-cs06spi2-tx 6spi2-rx 6uart0uart0-xfer 65*uart0-cts5+uart0-rts5,uart1uart1-xfer  6 6-uart1-cts5uart1-rts 5uart2uart2-xfer 65.uart2-cts5uart2-rts5usb-hosthost-vbus-drv5:usb-otgotg-vbus-drv58chosen/serial@20068000memory@60000000memory`@vcc5v0-otg-regulatorregulator-fixed 7default8 vcc5v0_otgLK@LK@vcc5v0-host-regulatorregulator-fixed 9default: vcc5v0_host6LK@LK@ compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3serial0serial1serial2mmc0interruptsinterrupt-affinityenable-methoddevice_typeregclock-latencyclocksresetsoperating-points-v2#cooling-cellsphandleopp-sharedopp-hzopp-microvoltopp-suspendarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsrangesinterrupt-namesclock-namespower-domainsstatus#power-domain-cellspm_qosinterrupt-controller#interrupt-cellsdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesvbus-supplydmasdma-namesfifo-depthmax-frequencyreset-namesbus-widthpinctrl-namespinctrl-0rockchip,grf#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parents#phy-cells#pwm-cellsreg-io-widthreg-shift#io-channel-cellsarm,pl330-broken-no-flushparm,pl330-periph-burst#dma-cellsrx-fifo-depthtx-fifo-depthgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinsstdout-pathgpioregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-on