8(\pnetxeon,r89rockchip,rk3288& 7Netxeon R89aliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000/i2c@ff140000/i2c@ff660000/i2c@ff150000/i2c@ff160000/i2c@ff170000/mmc@ff0f0000/mmc@ff0c0000/mmc@ff0d0000/mmc@ff0e0000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500#cpuarm,cortex-a12/3:N]@krr cpu@501#cpuarm,cortex-a12/3:N]@krr cpu@502#cpuarm,cortex-a12/3:N]@krr cpu@503#cpuarm,cortex-a12/3:N]@krr opp-table-0operating-points-v2opp-126000000 opp-216000000  opp-312000000 opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJ opp-1608000000_"preserved-memorydma-unusable@fe000000/oscillator fixed-clockn6xin24m timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer/  H ka  1pclktimerdisplay-subsystemrockchip,display-subsystem= mmc@ff0c0000rockchip,rk3288-dw-mshcCр kDrv1biuciuciu-driveciu-sampleQ / @3\resethokayoydefault mmc@ff0d0000rockchip,rk3288-dw-mshcCр kEsw1biuciuciu-driveciu-sampleQ !/ @3\reset hdisabledmmc@ff0e0000rockchip,rk3288-dw-mshcCр kFtx1biuciuciu-driveciu-sampleQ "/@3\reset hdisabledmmc@ff0f0000rockchip,rk3288-dw-mshcCр kGuy1biuciuciu-driveciu-sampleQ #/@3\reset hdisabledsaradc@ff100000rockchip,saradc/ $kI[1saradcapb_pclk3W \saradc-apbhokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spikAR1spiclkapb_pclk   txrx ,default/ hdisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spikBS1spiclkapb_pclk  txrx -default/ hdisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spikCT1spiclkapb_pclk txrx .default / hdisabledi2c@ff140000rockchip,rk3288-i2c/ >1i2ckMdefault! hdisabledi2c@ff150000rockchip,rk3288-i2c/ ?1i2ckOdefault" hdisabledi2c@ff160000rockchip,rk3288-i2c/ @1i2ckPdefault# hdisabledi2c@ff170000rockchip,rk3288-i2c/ A1i2ckQdefault$hokayserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart/ 7!kMU1baudclkapb_pclk txrxdefault%hokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart/ 8!kNV1baudclkapb_pclk txrxdefault&hokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart/i 9!kOW1baudclkapb_pclkdefault'hokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart/ :!kPX1baudclkapb_pclk txrxdefault(hokayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart/ ;!kQY1baudclkapb_pclk   txrxdefault)hokaydma-controller@ff250000arm,pl330arm,primecell/%@.9Tk 1apb_pclkthermal-zonesreserve-thermalk*cpu-thermalkd*tripscpu_alert0p*passive+cpu_alert1$*passive,cpu_crit_ *criticalcooling-mapsmap0+0map1,0gpu-thermalkd*tripsgpu_alert0p*passive-gpu_crit_ *criticalcooling-mapsmap0- .tsadc@ff280000rockchip,rk3288-tsadc/( %kHZ1tsadcapb_pclk3 \tsadc-apbinitdefaultsleep/0/1shokay/*ethernet@ff290000rockchip,rk3288-gmac/)Jmacirqeth_wake_irq18kfgc]M1stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac3B \stmmacethhokayZ2ergmiininput {3 'B@4default50usb@ff500000 generic-ehci/P k6usbhokayusb@ff520000 generic-ohci/R )k6usb hdisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/T k1otghost7 usb2-phyhokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/X k1otgotg/>@@ 8 usb2-phyhokayusb@ff5c0000 generic-ehci/\ k hdisableddma-controller@ff600000arm,pl330arm,primecell/`@.9Tk 1apb_pclk hdisabledi2c@ff650000rockchip,rk3288-i2c/e <1i2ckLdefault9hokaypmic@40silergy,syr827/@MjVDD_CPUy, Pp@: pmic@41silergy,syr828/AMjVDD_GPUy, Pp@:rtc@51haoyu,hym8563/Qxin32k&;default<pmic@5aactive-semi,act8846/Zdefault=> regulatorsREG1jVCC_DDROOREG2jVCC_IO2Z2ZwREG3jVDD_LOGB@B@REG4jVCC_20REG5 jVCCIO_SD2Z2ZREG6 jVDD10_LCDB@B@REG7jVCC_WL2Z2ZREG8jVCCA_332Z2ZREG9jVCC_LAN2Z2Z2REG10jVDD_10B@B@REG11jVCC_18w@w@REG12 jVCC18_LCDw@w@i2c@ff660000rockchip,rk3288-i2c/f =1i2ckNdefault? hdisabledpwm@ff680000rockchip,rk3288-pwm/h#default@k_hokaypwm@ff680010rockchip,rk3288-pwm/h#defaultAk_ hdisabledpwm@ff680020rockchip,rk3288-pwm/h #defaultBk_ hdisabledpwm@ff680030rockchip,rk3288-pwm/h0#defaultCk_ hdisabledsram@ff700000 mmio-sram/ppsmp-sram@0rockchip,rk3066-smp-sram/sram@ff720000#rockchip,rk3288-pmu-srammmio-sram/rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd/spower-controller!rockchip,rk3288-power-controller.h Upower-domain@9/ kchgfdehilkj$BDEFGHIJKL.power-domain@11/ kopBMN.power-domain@12/ kBO.power-domain@13/ kBPQ.reboot-modesyscon-reboot-modeIPRB\RBjRB zRBsyscon@ff740000rockchip,rk3288-sgrfsyscon/tclock-controller@ff760000rockchip,rk3288-cru/vk 1xin24m1Hjk$#gׄeрxhрxhsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd/w1edp-phyrockchip,rk3288-dp-phykh124m hdisabledeio-domains"rockchip,rk3288-io-voltage-domain hdisabledusbphyrockchip,rk3288-usb-phyhokayusb-phy@320/ k]1phyclk3 \phy-reset8usb-phy@334/4k^1phyclk3 \phy-reset6usb-phy@348/Hk_1phyclk3 \phy-reset7watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/kp Ohokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif/kT 1mclkhclkR tx 6defaultS1 hdisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s/ 5kR1i2s_clki2s_hclkRR txrxdefaultT hdisabledcrypto@ff8a0000rockchip,rk3288-crypto/@ 0 k}1aclkhclksclkapb_pclk3 \crypto-rstiommu@ff900800rockchip,iommu/@ k 1aclkiface hdisablediommu@ff914000rockchip,iommu /@P k 1aclkiface hdisabledrga@ff920000rockchip,rk3288-rga/ kj1aclkhclksclk!U 3ilm \coreaxiahbvop@ff930000rockchip,rk3288-vop / k1aclk_vopdclk_vophclk_vop!U 3def \axiahbdclk/Vhokayport endpoint@0/6Whendpoint@1/6Xfendpoint@2/6Y`endpoint@3/6Zciommu@ff930300rockchip,iommu/ k 1aclkiface!U hokayVvop@ff940000rockchip,rk3288-vop / k1aclk_vopdclk_vophclk_vop!U 3 \axiahbdclk/[hokayport endpoint@0/6\iendpoint@1/6]gendpoint@2/6^aendpoint@3/6_diommu@ff940300rockchip,iommu/ k 1aclkiface!U hokay[dsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi/@ k~d 1refpclk!U 1 hdisabledportsport@0/endpoint@0/6`Yendpoint@1/6a^port@1/lvds@ff96c000rockchip,rk3288-lvds/@kg 1pclk_lvdslcdcb!U 1 hdisabledportsport@0/endpoint@0/6cZendpoint@1/6d_port@1/dp@ff970000rockchip,rk3288-dp/@ bkic1dppclkedp!U 3o\dp1 hdisabledportsport@0/endpoint@0/6fXendpoint@1/6g]port@1/hdmi@ff980000rockchip,rk3288-dw-hdmi/! gkhmn1iahbisfrcec!U 1hokayportsport@0/endpoint@0/6hWendpoint@1/6i\port@1/video-codec@ff9a0000rockchip,rk3288-vpu/   Jvepuvdpuk 1aclkhclk/j!U iommu@ff9a0800rockchip,iommu/ k 1aclkiface!U jiommu@ff9c0440rockchip,iommu /@@@ ok 1aclkiface hdisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760/$ Jjobmmugpuk:kN!U  hdisabled.opp-table-1operating-points-v2kopp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon/ Pqos@ffaa0080rockchip,rk3288-qossyscon/ Qqos@ffad0000rockchip,rk3288-qossyscon/ Eqos@ffad0100rockchip,rk3288-qossyscon/ Fqos@ffad0180rockchip,rk3288-qossyscon/ Gqos@ffad0400rockchip,rk3288-qossyscon/ Hqos@ffad0480rockchip,rk3288-qossyscon/ Iqos@ffad0500rockchip,rk3288-qossyscon/ Dqos@ffad0800rockchip,rk3288-qossyscon/ Jqos@ffad0880rockchip,rk3288-qossyscon/ Kqos@ffad0900rockchip,rk3288-qossyscon/ Lqos@ffae0000rockchip,rk3288-qossyscon/ Oqos@ffaf0000rockchip,rk3288-qossyscon/ Mqos@ffaf0080rockchip,rk3288-qossyscon/ Ndma-controller@ffb20000arm,pl330arm,primecell/@.9Tk 1apb_pclkRefuse@ffb40000rockchip,rk3288-efuse/ kq 1pclk_efusecpu-id@7/cpu_leakage@17/interrupt-controller@ffc01000 arm,gic-400F[@/ @ `   pinctrlrockchip,rk3288-pinctrl1gpio@ff750000rockchip,gpio-bank/u Qk@l|F[;gpio@ff780000rockchip,gpio-bank/x RkAl|F[gpio@ff790000rockchip,gpio-bank/y SkBl|F[gpio@ff7a0000rockchip,gpio-bank/z TkCl|F[gpio@ff7b0000rockchip,gpio-bank/{ UkDl|F[3gpio@ff7c0000rockchip,gpio-bank/| VkEl|F[gpio@ff7d0000rockchip,gpio-bank/} WkFl|F[gpio@ff7e0000rockchip,gpio-bank/~ XkGl|F[sgpio@ff7f0000rockchip,gpio-bank/ YkHl|F[hdmihdmi-cec-c0lhdmi-cec-c7lhdmi-ddc llhdmi-ddc-unwedge mlpcfg-output-lowmpcfg-pull-upnpcfg-pull-downopcfg-pull-nonelpcfg-pull-none-12ma psuspendglobal-pwrofflddrio-pwrofflddr0-retentionnddr1-retentionnedpedp-hpd oi2c0i2c0-xfer ll9i2c1i2c1-xfer ll!i2c2i2c2-xfer  l l?i2c3i2c3-xfer ll"i2c4i2c4-xfer ll#i2c5i2c5-xfer ll$i2s0i2s0-bus`llllllTlcdclcdc-ctl@llllbsdmmcsdmmc-clkl sdmmc-cmdnsdmmc-cdnsdmmc-bus1nsdmmc-bus4@nnnnsdio0sdio0-bus1nsdio0-bus4@nnnnsdio0-cmdnsdio0-clklsdio0-cdnsdio0-wpnsdio0-pwrnsdio0-bkpwrnsdio0-intnsdio1sdio1-bus1nsdio1-bus4@nnnnsdio1-cdnsdio1-wpnsdio1-bkpwrnsdio1-intnsdio1-cmdnsdio1-clklsdio1-pwr nemmcemmc-clklemmc-cmdnemmc-pwr nemmc-bus1nemmc-bus4@nnnnemmc-bus8nnnnnnnnspi0spi0-clk nspi0-cs0 nspi0-txnspi0-rxnspi0-cs1nspi1spi1-clk nspi1-cs0 nspi1-rxnspi1-txnspi2spi2-cs1nspi2-clknspi2-cs0n spi2-rxnspi2-tx nuart0uart0-xfer nl%uart0-ctsnuart0-rtsluart1uart1-xfer n l&uart1-cts nuart1-rts luart2uart2-xfer nl'uart3uart3-xfer nl(uart3-cts nuart3-rts luart4uart4-xfer nl)uart4-cts nuart4-rts ltsadcotp-pin l/otp-out l0pwm0pwm0-pinl@pwm1pwm1-pinlApwm2pwm2-pinlBpwm3pwm3-pinlCgmacrgmii-pinsllllpppplll ppll5rmii-pinsllllllllllspdifspdif-tx lSpcfg-output-highqact8846pmic-vselm=pwr-holdq>buttonspwrbtnnririr-intntpmicpmic-intn<usbhost-vbus-drvluotg-vbus-drv lvmemory@0#memory/external-gmac-clock fixed-clocksY@ ext_gmac4gpio-keys gpio-keysdefaultrkey-power ;tGPIO Key Power&dir-receivergpio-ir-receiver sdefaulttvcc-host-regulatorregulator-fixed8 ;defaultu jvcc_hostvcc-otg-regulatorregulator-fixed8 ; defaultvjvcc_otgsdmmc-regulatorregulator-fixed jsdmmc-supply2Z2Z s Kwsys-regulatorregulator-fixed jsys-supplyLK@LK@: #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supply#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplysystem-power-controller#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highautorepeatgpioslinux,codelabellinux,input-typewakeup-sourcedebounce-intervalenable-active-highstartup-delay-us