N8( #radxa,rock2-squarerockchip,rk3288&7Radxa Rock 2 Squarealiases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000/i2c@ff140000/i2c@ff660000/i2c@ff150000/i2c@ff160000/i2c@ff170000/mmc@ff0f0000/mmc@ff0c0000/mmc@ff0d0000/mmc@ff0e0000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500#cpuarm,cortex-a12/3:N]@krr cpu@501#cpuarm,cortex-a12/3:N]@krrcpu@502#cpuarm,cortex-a12/3:N]@krrcpu@503#cpuarm,cortex-a12/3:N]@krropp-table-0operating-points-v2opp-126000000 opp-216000000  opp-312000000 opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJ opp-1608000000_"preserved-memorydma-unusable@fe000000/oscillator fixed-clockn6xin24m timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer/  H ka  2pclktimerdisplay-subsystemrockchip,display-subsystem> mmc@ff0c0000rockchip,rk3288-dw-mshcDр kDrv2biuciuciu-driveciu-sampleR / @3]resetiokaypzdefault mmc@ff0d0000rockchip,rk3288-dw-mshcDр kEsw2biuciuciu-driveciu-sampleR !/ @3]resetiokaypdefaultmmc@ff0e0000rockchip,rk3288-dw-mshcDр kFtx2biuciuciu-driveciu-sampleR "/@3]reset idisabledmmc@ff0f0000rockchip,rk3288-dw-mshcDр kGuy2biuciuciu-driveciu-sampleR #/@3]resetiokaypzdefault saradc@ff100000rockchip,saradc/ $kI[2saradcapb_pclk3W ]saradc-apbiokay#spi@ff110000(rockchip,rk3288-spirockchip,rk3066-spikAR2spiclkapb_pclk/  4txrx ,default !"#/ idisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spikBS2spiclkapb_pclk/ 4txrx -default$%&'/ idisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spikCT2spiclkapb_pclk/4txrx .default()*+/ idisabledi2c@ff140000rockchip,rk3288-i2c/ >2i2ckMdefault, idisabledi2c@ff150000rockchip,rk3288-i2c/ ?2i2ckOdefault- idisabledi2c@ff160000rockchip,rk3288-i2c/ @2i2ckPdefault. idisabledi2c@ff170000rockchip,rk3288-i2c/ A2i2ckQdefault/iokaytserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart/ 7>HkMU2baudclkapb_pclk/4txrxdefault0 idisabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart/ 8>HkNV2baudclkapb_pclk/4txrxdefault1 idisabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart/i 9>HkOW2baudclkapb_pclkdefault2iokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart/ :>HkPX2baudclkapb_pclk/4txrxdefault3 idisabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart/ ;>HkQY2baudclkapb_pclk/  4txrxdefault4 idisableddma-controller@ff250000arm,pl330arm,primecell/%@U`{k 2apb_pclkthermal-zonesreserve-thermal5cpu-thermald5tripscpu_alert0p*passive6cpu_alert1$*passive7cpu_crit_ *criticalcooling-mapsmap060map170gpu-thermald5tripsgpu_alert0p*passive8gpu_crit_ *criticalcooling-mapsmap08 9tsadc@ff280000rockchip,rk3288-tsadc/( %kHZ2tsadcapb_pclk3 ]tsadc-apbinitdefaultsleep:;:<(siokay?V5ethernet@ff290000rockchip,rk3288-gmac/)qmacirqeth_wake_irq<8kfgc]M2stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac3B ]stmmacethiokay=inputrgmii>default?@ A 'u0 0usb@ff500000 generic-ehci/P kBusbiokayusb@ff520000 generic-ohci/R )kBusb idisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/T k2otg%hostC usb2-phy-iokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/X k2otg%otgDVe@@ D usb2-phyiokayusb@ff5c0000 generic-ehci/\ k idisableddma-controller@ff600000arm,pl330arm,primecell/`@U`{k 2apb_pclk idisabledi2c@ff650000rockchip,rk3288-i2c/e <2i2ckLdefaultEiokayact8846@5aactive-semi,act8846/ZtFGFFFFregulatorsREG1VCC_DDROOREG2VCC_IO2Z2ZREG3VDD_LOGB@B@REG4VCC_20GREG5 VCCIO_SD2Z2ZREG6 VDD10_LCDB@B@REG7 VCCA_CODEC2Z2ZREG8VCCA_TP2Z2ZREG9 VCCIO_PMU2Z2Z>REG10VDD_10B@B@REG11VCC_18w@w@REG12 VCC18_LCDw@w@syr827@40silergy,syr827/@/L^,vdd_cpu Ppz@F syr828@41silergy,syr828/A/^, Ppvdd_gpuz@Fyrtc@51haoyu,hym8563/Qxin32k&HdefaultIi2c@ff660000rockchip,rk3288-i2c/f =2i2ckNdefaultJiokayes8388@10everest,es8388everest,es8328/kqpwm@ff680000rockchip,rk3288-pwm/hdefaultKk_ idisabledpwm@ff680010rockchip,rk3288-pwm/hdefaultLk_ idisabledpwm@ff680020rockchip,rk3288-pwm/h defaultMk_ idisabledpwm@ff680030rockchip,rk3288-pwm/h0defaultNk_ idisabledsram@ff700000 mmio-sram/ppsmp-sram@0rockchip,rk3066-smp-sram/sram@ff720000#rockchip,rk3288-pmu-srammmio-sram/rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd/spower-controller!rockchip,rk3288-power-controllerh apower-domain@9/ kchgfdehilkj$OPQRSTUVWpower-domain@11/ kopXYpower-domain@12/ kZpower-domain@13/ k[\reboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscon/tclock-controller@ff760000rockchip,rk3288-cru/vk 2xin24m<"Hjk$/#gׄeрxhрxhsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd/w<edp-phyrockchip,rk3288-dp-phykh224mD idisabledqio-domains"rockchip,rk3288-io-voltage-domainiokayO\fq>>usbphyrockchip,rk3288-usb-phyiokayusb-phy@320D/ k]2phyclk3 ]phy-resetDusb-phy@334D/4k^2phyclk3 ]phy-reset]Busb-phy@348D/Hk_2phyclk3 ]phy-resetCwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/kp Oiokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif/kT 2mclkhclk/^4tx 6default_<iokayi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s/ 5kR2i2s_clki2s_hclk/^^4txrxdefault` iokaycrypto@ff8a0000rockchip,rk3288-crypto/@ 0 k}2aclkhclksclkapb_pclk3 ]crypto-rstiommu@ff900800rockchip,iommu/@ k 2aclkiface# idisablediommu@ff914000rockchip,iommu /@P k 2aclkiface#0 idisabledrga@ff920000rockchip,rk3288-rga/ kj2aclkhclksclkKa 3ilm ]coreaxiahbvop@ff930000rockchip,rk3288-vop / k2aclk_vopdclk_vophclk_vopKa 3def ]axiahbdclkYbiokayport endpoint@0/`cuendpoint@1/`drendpoint@2/`elendpoint@3/`foiommu@ff930300rockchip,iommu/ k 2aclkifaceKa #iokaybvop@ff940000rockchip,rk3288-vop / k2aclk_vopdclk_vophclk_vopKa 3 ]axiahbdclkYgiokayport endpoint@0/`hvendpoint@1/`isendpoint@2/`jmendpoint@3/`kpiommu@ff940300rockchip,iommu/ k 2aclkifaceKa #iokaygdsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi/@ k~d 2refpclkKa < idisabledportsport@0/endpoint@0/`leendpoint@1/`mjport@1/lvds@ff96c000rockchip,rk3288-lvds/@kg 2pclk_lvdslcdcnKa < idisabledportsport@0/endpoint@0/`ofendpoint@1/`pkport@1/dp@ff970000rockchip,rk3288-dp/@ bkic2dppclkqdpKa 3o]dp< idisabledportsport@0/endpoint@0/`rdendpoint@1/`siport@1/hdmi@ff980000rockchip,rk3288-dw-hdmi/H gkhmn2iahbisfrcecKa <iokayptportsport@0/endpoint@0/`ucendpoint@1/`vhport@1/video-codec@ff9a0000rockchip,rk3288-vpu/   qvepuvdpuk 2aclkhclkYwKa iommu@ff9a0800rockchip,iommu/ k 2aclkiface#Ka wiommu@ff9c0440rockchip,iommu /@@@ ok 2aclkiface# idisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760/$ qjobmmugpuk:xNKa iokay|y9opp-table-1operating-points-v2xopp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon/ [qos@ffaa0080rockchip,rk3288-qossyscon/ \qos@ffad0000rockchip,rk3288-qossyscon/ Pqos@ffad0100rockchip,rk3288-qossyscon/ Qqos@ffad0180rockchip,rk3288-qossyscon/ Rqos@ffad0400rockchip,rk3288-qossyscon/ Sqos@ffad0480rockchip,rk3288-qossyscon/ Tqos@ffad0500rockchip,rk3288-qossyscon/ Oqos@ffad0800rockchip,rk3288-qossyscon/ Uqos@ffad0880rockchip,rk3288-qossyscon/ Vqos@ffad0900rockchip,rk3288-qossyscon/ Wqos@ffae0000rockchip,rk3288-qossyscon/ Zqos@ffaf0000rockchip,rk3288-qossyscon/ Xqos@ffaf0080rockchip,rk3288-qossyscon/ Ydma-controller@ffb20000arm,pl330arm,primecell/@U`{k 2apb_pclk^efuse@ffb40000rockchip,rk3288-efuse/ kq 2pclk_efusecpu-id@7/cpu_leakage@17/interrupt-controller@ffc01000 arm,gic-400@/ @ `   pinctrlrockchip,rk3288-pinctrl<gpio@ff750000rockchip,gpio-bank/u Qk@Hgpio@ff780000rockchip,gpio-bank/x RkAgpio@ff790000rockchip,gpio-bank/y SkBgpio@ff7a0000rockchip,gpio-bank/z TkCgpio@ff7b0000rockchip,gpio-bank/{ UkDAgpio@ff7c0000rockchip,gpio-bank/| VkEgpio@ff7d0000rockchip,gpio-bank/} WkFgpio@ff7e0000rockchip,gpio-bank/~ XkGgpio@ff7f0000rockchip,gpio-bank/ YkHhdmihdmi-cec-c0zhdmi-cec-c7zhdmi-ddc zzhdmi-ddc-unwedge {zpcfg-output-low{pcfg-pull-up|pcfg-pull-down}pcfg-pull-nonezpcfg-pull-none-12ma ~suspendglobal-pwroffzddrio-pwroffzddr0-retention|ddr1-retention|edpedp-hpd }i2c0i2c0-xfer zzEi2c1i2c1-xfer zz,i2c2i2c2-xfer  z zJi2c3i2c3-xfer zz-i2c4i2c4-xfer zz.i2c5i2c5-xfer zz/i2s0i2s0-bus`zzzzzz`lcdclcdc-ctl@zzzznsdmmcsdmmc-clkz sdmmc-cmd|sdmmc-cd|sdmmc-bus1|sdmmc-bus4@||||sdmmc-pwr zsdio0sdio0-bus1|sdio0-bus4@||||sdio0-cmd|sdio0-clkzsdio0-cd|sdio0-wp|sdio0-pwr|sdio0-bkpwr|sdio0-int|sdio1sdio1-bus1|sdio1-bus4@||||sdio1-cd|sdio1-wp|sdio1-bkpwr|sdio1-int|sdio1-cmd|sdio1-clkzsdio1-pwr |emmcemmc-clkzemmc-cmd|emmc-pwr |emmc-bus1|emmc-bus4@||||emmc-bus8||||||||emmc-reset zspi0spi0-clk | spi0-cs0 |#spi0-tx|!spi0-rx|"spi0-cs1|spi1spi1-clk |$spi1-cs0 |'spi1-rx|&spi1-tx|%spi2spi2-cs1|spi2-clk|(spi2-cs0|+spi2-rx|*spi2-tx |)uart0uart0-xfer |z0uart0-cts|uart0-rtszuart1uart1-xfer | z1uart1-cts |uart1-rts zuart2uart2-xfer |z2uart3uart3-xfer |z3uart3-cts |uart3-rts zuart4uart4-xfer |z4uart4-cts |uart4-rts ztsadcotp-pin z:otp-out z;pwm0pwm0-pinzKpwm1pwm1-pinzLpwm2pwm2-pinzMpwm3pwm3-pinzNgmacrgmii-pinszzzz~~~~zzz ~~zz?rmii-pinszzzzzzzzzzphy-rst@spdifspdif-tx z_pcfg-output-high irir-int|keyspwr-key|pmicpmic-int|Iheadphonehp-detzphone-ctl|usbhost-vbus-drvzsatasata-pwr-en zsdiowifi-enablezmemory@0/#memoryemmc-pwrseqmmc-pwrseq-emmcdefault ' external-gmac-clock fixed-clocksY@ ext_gmac=flash-regulatorregulator-fixed vcc_flashw@w@ 3vsys-regulatorregulator-fixedvcc_sysLK@LK@LFchosen Dserial2:115200n8adc-keys adc-keys P \buttons mw@button-recovery Recovery h gpio-keys gpio-keyskey-power -H GPIO Power tdefault gpio-leds gpio-ledsled-0 - rock2:green:state1 heartbeatled-1 -H  rock2:blue:state2 mmc0ir-receivergpio-ir-receiver -defaultsoundsimple-audio-card SPDIFsimple-audio-card,dai-link@1cpu codec sata-prw-regulatorregulator-fixed  H default sata_pwrspdif-outlinux,spdif-ditsound-i2srockchip,rk3288-hdmi-analogdefault   5 J bI2S qAnalogLOUT2AnalogROUT2sdio-pwrseqmmc-pwrseq-simplek 2ext_clockdefault 'Avcc-host-regulatorregulator-fixed  Hdefault vcc_host]sdmmc-regulatorregulator-fixed  defaultvcc_sd2Z2Z #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-sdio-irqmmc-pwrseqnon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usrx_delaytx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizesystem-power-controllerinl1-supplyinl2-supplyinl3-supplyvp1-supplyvp2-supplyvp3-supplyvp4-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onfcs,suspend-voltage-selectorregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplyAVDD-supplyDVDD-supplyHPVDD-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supplyvbus-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highreset-gpiosstartup-delay-usstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltwakeup-sourcelinux,default-triggersimple-audio-card,namesound-daienable-active-highrockchip,audio-codecrockchip,hp-det-gpiosrockchip,hp-en-gpiosrockchip,i2s-controllerrockchip,modelrockchip,routing