%8֐(X(ti,am3517-craneboardti,am3517ti,omap3 +#7TI AM3517 CraneBoard (TMDSEVM3517)chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@4809e000{/ocp@68000000/can@5c050000 /ocp@68000000/ethernet@5c000000cpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2iva disableddsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+%Ctps-pins`tscm_conf@270sysconsimple-busp0+ p0tpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap|pbias_mmc_omap2430pbias_mmc_omap2430w@-tclocks+clock@68 ti,clkselhclock-mcbsp5-mux-fckti,composite-mux-clockmcbsp5_mux_fckt clock-mcbsp3-mux-fckti,composite-mux-clockmcbsp3_mux_fcktclock-mcbsp4-mux-fckti,composite-mux-clockmcbsp4_mux_fcktmcbsp5_fckti,composite-clock tclock@4 ti,clkselclock-mcbsp1-mux-fckti,composite-mux-clockmcbsp1_mux_fckt clock-mcbsp2-mux-fckti,composite-mux-clockmcbsp2_mux_fckt mcbsp1_fckti,composite-clock tmcbsp2_fckti,composite-clock tmcbsp3_fckti,composite-clocktmcbsp4_fckti,composite-clocktemac_ick@32cti,am35xx-gate-clock,txemac_fck@32cti,gate-clock, tvpfe_ick@32cti,am35xx-gate-clock,tyvpfe_fck@32cti,gate-clock, hsotgusb_ick_am35xx@32cti,am35xx-gate-clock,tzhsotgusb_fck_am35xx@32cti,gate-clock,t{hecc_ck@32cti,am35xx-gate-clock,t|clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+%Cprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYtosc_sys_ck@d40 ti,mux-clock @tsys_ck@1270ti,divider-clockp tsys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock!,dpll3_m2x2_ckfixed-factor-clock!,t dpll4_x2_ckfixed-factor-clock!,corex2_fckfixed-factor-clock !,t!wkup_l4_ickfixed-factor-clock!,tVcorex2_d3_fckfixed-factor-clock!!,trcorex2_d5_fckfixed-factor-clock!!,tsclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clocktFvirt_12m_ck fixed-clocktvirt_13m_ck fixed-clock]@tvirt_19200000_ck fixed-clock$tvirt_26000000_ck fixed-clocktvirt_38_4m_ck fixed-clockItdpll4_ck@d00ti,omap3-dpll-per-clock D 0tdpll4_m2_ck@d48ti,divider-clock? H t"dpll4_m2x2_mul_ckfixed-factor-clock"!,t#dpll4_m2x2_ck@d00ti,gate-clock# 6t$omap_96m_alwon_fckfixed-factor-clock$!,t0dpll3_ck@d00ti,omap3-dpll-core-clock @ 0tclock@1140 ti,clksel@clock-dpll3-m3ti,divider-clock dpll3_m3_ck t*clock-dpll4-m6ti,divider-clock dpll4_m6_ck? t<clock-emu-src-mux ti,mux-clockemu_src_mux_ck%&'tjclock-pclk-fckti,divider-clock pclk_fck( clock-pclkx2-fckti,divider-clock pclkx2_fck( clock-atclk-fckti,divider-clock atclk_fck( clock-traceclk-src-fck ti,mux-clocktraceclk_src_fck%&'t)clock-traceclk-fckti,divider-clock traceclk_fck)  dpll3_m3x2_mul_ckfixed-factor-clock*!,t+dpll3_m3x2_ck@d00ti,gate-clock+  6t,emu_core_alwon_ckfixed-factor-clock,!,t%sys_altclk fixed-clockt3mcbsp_clks fixed-clocktcore_ckfixed-factor-clock!,t-dpll1_fck@940ti,divider-clock- @ t.dpll1_ck@904ti,omap3-dpll-clock.  $ @ 4tdpll1_x2_ckfixed-factor-clock!,t/dpll1_x2m2_ck@944ti,divider-clock/ D tCcm_96m_fckfixed-factor-clock0!,t1clock@d40 ti,clksel @clock-dpll3-m2ti,divider-clock dpll3_m2_ck tclock-omap-96m-fck ti,mux-clock omap_96m_fck1tNclock-omap-54m-fck ti,mux-clock omap_54m_fck23t?clock-omap-48m-fck ti,mux-clock omap_48m_fck43t7clock@e40 ti,clksel@clock-dpll4-m3ti,divider-clock dpll4_m3_ck  t5clock-dpll4-m4ti,divider-clock dpll4_m4_ck t8dpll4_m3x2_mul_ckfixed-factor-clock5!,t6dpll4_m3x2_ck@d00ti,gate-clock6 6t2cm_96m_d2_fckfixed-factor-clock1!,t4omap_12m_fckfixed-factor-clock7!,tOdpll4_m4x2_mul_ckti,fixed-factor-clock8LZgt9dpll4_m4x2_ck@d00ti,gate-clock9 6gtRdpll4_m5_ck@f40ti,divider-clock?@ t:dpll4_m5x2_mul_ckti,fixed-factor-clock:LZgt;dpll4_m5x2_ck@d00ti,gate-clock; 6gdpll4_m6x2_mul_ckfixed-factor-clock<!,t=dpll4_m6x2_ck@d00ti,gate-clock= 6t>emu_per_alwon_ckfixed-factor-clock>!,t&clock@d70 ti,clksel pclock-clkout2-src-gate ti,composite-no-wait-gate-clockclkout2_src_gate_ck-tAclock-clkout2-src-muxti,composite-mux-clockclkout2_src_mux_ck-1?tBclock-sys-clkout2ti,divider-clock sys_clkout2@@zclkout2_src_ckti,composite-clockABt@mpu_ckfixed-factor-clockC!,tDarm_fck@924ti,divider-clockD $emu_mpu_alwon_ckfixed-factor-clockD!,t'clock@a40 ti,clksel @clock-l3-ickti,divider-clockl3_ick- tEclock-l4-ickti,divider-clockl4_ickE tGclock-gpt10-mux-fckti,composite-mux-clockgpt10_mux_fckFtKclock-gpt11-mux-fckti,composite-mux-clockgpt11_mux_fckFtMclock@c40 ti,clksel @clock-rm-ickti,divider-clockrm_ickG clock-gpt1-mux-fckti,composite-mux-clock gpt1_mux_fckFtUclock@a00 ti,clksel clock-gpt10-gate-fckti,composite-gate-clockgpt10_gate_fck tJclock-gpt11-gate-fckti,composite-gate-clockgpt11_gate_fck tLclock-mmchs2-fckti,wait-gate-clock mmchs2_fcktclock-mmchs1-fckti,wait-gate-clock mmchs1_fcktclock-i2c3-fckti,wait-gate-clock i2c3_fcktclock-i2c2-fckti,wait-gate-clock i2c2_fcktclock-i2c1-fckti,wait-gate-clock i2c1_fcktclock-mcbsp5-gate-fckti,composite-gate-clockmcbsp5_gate_fck tclock-mcbsp1-gate-fckti,composite-gate-clockmcbsp1_gate_fck t clock-mcspi4-fckti,wait-gate-clock mcspi4_fckHtclock-mcspi3-fckti,wait-gate-clock mcspi3_fckHtclock-mcspi2-fckti,wait-gate-clock mcspi2_fckHtclock-mcspi1-fckti,wait-gate-clock mcspi1_fckHtclock-uart2-fckti,wait-gate-clock uart2_fckHtclock-uart1-fckti,wait-gate-clock uart1_fckH tclock-hdq-fckti,wait-gate-clockhdq_fckItclock-uart4-fck-am35xxti,wait-gate-clockuart4_fck_am35xxHclock-mmchs3-fckti,wait-gate-clock mmchs3_fcktgpt10_fckti,composite-clockJKgpt11_fckti,composite-clockLMcore_96m_fckfixed-factor-clockN!,tcore_48m_fckfixed-factor-clock7!,tHcore_12m_fckfixed-factor-clockO!,tIcore_l3_ickfixed-factor-clockE!,tPclock@a10 ti,clksel clock-sdrc-ickti,wait-gate-clock sdrc_ickPtwclock-mmchs2-ickti,omap3-interface-clock mmchs2_ickQtclock-mmchs1-ickti,omap3-interface-clock mmchs1_ickQtclock-hdq-ickti,omap3-interface-clockhdq_ickQtclock-mcspi4-ickti,omap3-interface-clock mcspi4_ickQtclock-mcspi3-ickti,omap3-interface-clock mcspi3_ickQtclock-mcspi2-ickti,omap3-interface-clock mcspi2_ickQtclock-mcspi1-ickti,omap3-interface-clock mcspi1_ickQtclock-i2c3-ickti,omap3-interface-clock i2c3_ickQtclock-i2c2-ickti,omap3-interface-clock i2c2_ickQtclock-i2c1-ickti,omap3-interface-clock i2c1_ickQtclock-uart2-ickti,omap3-interface-clock uart2_ickQtclock-uart1-ickti,omap3-interface-clock uart1_ickQ tclock-gpt11-ickti,omap3-interface-clock gpt11_ickQ tclock-gpt10-ickti,omap3-interface-clock gpt10_ickQ tclock-mcbsp5-ickti,omap3-interface-clock mcbsp5_ickQ tclock-mcbsp1-ickti,omap3-interface-clock mcbsp1_ickQ tclock-omapctrl-ickti,omap3-interface-clock omapctrl_ickQtclock-aes2-ickti,omap3-interface-clock aes2_ickQtclock-sha12-ickti,omap3-interface-clock sha12_ickQtclock-ipss-ickti,am35xx-interface-clock ipss_ickPtclock-uart4-ick-am35xxti,omap3-interface-clockuart4_ick_am35xxQclock-mmchs3-ickti,omap3-interface-clock mmchs3_ickQtgpmc_fckfixed-factor-clockP!,core_l4_ickfixed-factor-clockG!,tQclock@e00 ti,clkselclock-dss-tv-fckti,gate-clock dss_tv_fck?tclock-dss-96m-fckti,gate-clock dss_96m_fckNtclock-dss2-alwon-fckti,gate-clockdss2_alwon_fcktclock-dss1-alwon-fck-3430es2ti,dss-gate-clockdss1_alwon_fck_3430es2Rgtdummy_ck fixed-clockclock@c00 ti,clksel clock-gpt1-gate-fckti,composite-gate-clockgpt1_gate_fcktTclock-gpio1-dbckti,gate-clock gpio1_dbckStclock-wdt2-fckti,wait-gate-clock wdt2_fckStgpt1_fckti,composite-clockTUtwkup_32k_fckfixed-factor-clockF!,tSclock@c10 ti,clksel clock-wdt2-ickti,omap3-interface-clock wdt2_ickVtclock-wdt1-ickti,omap3-interface-clock wdt1_ickVtclock-gpio1-ickti,omap3-interface-clock gpio1_ickVtclock-omap-32ksync-ickti,omap3-interface-clockomap_32ksync_ickVtclock-gpt12-ickti,omap3-interface-clock gpt12_ickVtclock-gpt1-ickti,omap3-interface-clock gpt1_ickVtper_96m_fckfixed-factor-clock0!,tper_48m_fckfixed-factor-clock7!,tWclock@1000 ti,clkselclock-uart3-fckti,wait-gate-clock uart3_fckW t}clock-gpt2-gate-fckti,composite-gate-clockgpt2_gate_fcktYclock-gpt3-gate-fckti,composite-gate-clockgpt3_gate_fckt[clock-gpt4-gate-fckti,composite-gate-clockgpt4_gate_fckt]clock-gpt5-gate-fckti,composite-gate-clockgpt5_gate_fckt_clock-gpt6-gate-fckti,composite-gate-clockgpt6_gate_fcktaclock-gpt7-gate-fckti,composite-gate-clockgpt7_gate_fcktcclock-gpt8-gate-fckti,composite-gate-clockgpt8_gate_fck teclock-gpt9-gate-fckti,composite-gate-clockgpt9_gate_fck tgclock-gpio6-dbckti,gate-clock gpio6_dbckXt~clock-gpio5-dbckti,gate-clock gpio5_dbckXtclock-gpio4-dbckti,gate-clock gpio4_dbckXtclock-gpio3-dbckti,gate-clock gpio3_dbckXtclock-gpio2-dbckti,gate-clock gpio2_dbckX tclock-wdt3-fckti,wait-gate-clock wdt3_fckX tclock-mcbsp2-gate-fckti,composite-gate-clockmcbsp2_gate_fckt clock-mcbsp3-gate-fckti,composite-gate-clockmcbsp3_gate_fcktclock-mcbsp4-gate-fckti,composite-gate-clockmcbsp4_gate_fcktclock@1040 ti,clksel@clock-gpt2-mux-fckti,composite-mux-clock gpt2_mux_fckFtZclock-gpt3-mux-fckti,composite-mux-clock gpt3_mux_fckFt\clock-gpt4-mux-fckti,composite-mux-clock gpt4_mux_fckFt^clock-gpt5-mux-fckti,composite-mux-clock gpt5_mux_fckFt`clock-gpt6-mux-fckti,composite-mux-clock gpt6_mux_fckFtbclock-gpt7-mux-fckti,composite-mux-clock gpt7_mux_fckFtdclock-gpt8-mux-fckti,composite-mux-clock gpt8_mux_fckFtfclock-gpt9-mux-fckti,composite-mux-clock gpt9_mux_fckFthgpt2_fckti,composite-clockYZtgpt3_fckti,composite-clock[\gpt4_fckti,composite-clock]^gpt5_fckti,composite-clock_`gpt6_fckti,composite-clockabgpt7_fckti,composite-clockcdgpt8_fckti,composite-clockefgpt9_fckti,composite-clockghper_32k_alwon_fckfixed-factor-clockF!,tXper_l4_ickfixed-factor-clockG!,ticlock@1010 ti,clkselclock-gpio6-ickti,omap3-interface-clock gpio6_ickitclock-gpio5-ickti,omap3-interface-clock gpio5_ickitclock-gpio4-ickti,omap3-interface-clock gpio4_ickitclock-gpio3-ickti,omap3-interface-clock gpio3_ickitclock-gpio2-ickti,omap3-interface-clock gpio2_icki tclock-wdt3-ickti,omap3-interface-clock wdt3_icki tclock-uart3-ickti,omap3-interface-clock uart3_icki tclock-uart4-ickti,omap3-interface-clock uart4_ickitclock-gpt9-ickti,omap3-interface-clock gpt9_icki tclock-gpt8-ickti,omap3-interface-clock gpt8_icki tclock-gpt7-ickti,omap3-interface-clock gpt7_ickitclock-gpt6-ickti,omap3-interface-clock gpt6_ickitclock-gpt5-ickti,omap3-interface-clock gpt5_ickitclock-gpt4-ickti,omap3-interface-clock gpt4_ickitclock-gpt3-ickti,omap3-interface-clock gpt3_ickitclock-gpt2-ickti,omap3-interface-clock gpt2_ickitclock-mcbsp2-ickti,omap3-interface-clock mcbsp2_ickitclock-mcbsp3-ickti,omap3-interface-clock mcbsp3_ickitclock-mcbsp4-ickti,omap3-interface-clock mcbsp4_ickitemu_src_ckti,clkdm-gate-clockjt(secure_32k_fck fixed-clocktkgpt12_fckfixed-factor-clockk!,twdt1_fckfixed-factor-clockk!,rmii_ck fixed-clocktpclk_ck fixed-clocktdpll5_ck@d04ti,omap3-dpll-clock  $ L 4tldpll5_m2_ck@d50ti,divider-clockl P tvsgx_gate_fck@b00ti,composite-gate-clock- ttcore_d3_ckfixed-factor-clock-!,tmcore_d4_ckfixed-factor-clock-!,tncore_d6_ckfixed-factor-clock-!,toomap_192m_alwon_fckfixed-factor-clock$!,tpcore_d2_ckfixed-factor-clock-!,tqsgx_mux_fck@b40ti,composite-mux-clock mno1pqrs @tusgx_fckti,composite-clocktutsgx_ick@b10ti,wait-gate-clockE tcpefuse_fck@a08ti,gate-clock tts_fck@a08ti,gate-clockF tusbtll_fck@a08ti,wait-gate-clockv tclock@a18 ti,clksel clock-usbtll-ickti,omap3-interface-clock usbtll_ickQtdss_ick_3430es2@e10ti,omap3-dss-interface-clockGtusbhost_120m_fck@1400ti,gate-clockvtusbhost_48m_fck@1400ti,dss-gate-clock7tusbhost_ick@1410ti,omap3-dss-interface-clockGtclockdomainscore_l3_clkdmti,clockdomainwxyz{|dpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainh}~emu_clkdmti,clockdomain(dpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaindpll5_clkdmti,clockdomainlsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscSfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intcH ttarget-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss#  Pick+ H`dma-controller@0ti,omap3430-sdmati,omap-sdma  `tgpio@48310000ti,omap3-gpioH1gpio1!1gpio@49050000ti,omap3-gpioIgpio2!1gpio@49052000ti,omap3-gpioI gpio3!1gpio@49054000ti,omap3-gpioI@ gpio4!1gpio@49056000ti,omap3-gpioI`!gpio5!1gpio@49058000ti,omap3-gpioI"gpio6!1serial@4806a000ti,omap3-uartH =HQ12Vtxrxuart1lserial@4806c000ti,omap3-uartH=IQ34Vtxrxuart2lserial@49020000ti,omap3-uartI=JQ56Vtxrxuart3li2c@48070000 ti,omap3-i2cH8+i2c1'@tps@2d- ti,tps65910`defaultn xregulators+regulator@0vrtcregulator@1vioregulator@2vdd1 vdd_coreOOregulator@3vdd2vdd_shv2Z2Ztregulator@4vdd3regulator@5vdig1regulator@6vdig2regulator@7vpllw@w@regulator@8vdacw@w@regulator@9 vaux1w@w@regulator@10 vaux2w@w@regulator@11 vaux33regulator@12 vmmc2Z2Zregulator@13 vbbi2c@48072000 ti,omap3-i2cH 9+i2c2 disabledi2c@48060000 ti,omap3-i2cH=+i2c3 disabledmailbox@48094000ti,omap3-mailboxmailboxH @%1C disabledmbox-dsp U `spi@48098000ti,omap2-mcspiH A+mcspi1k@Q#$%&'()* Vtx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi2k Q+,-.Vtx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3k QVtx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4kQFGVtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1yQ=>Vtxrxmmc@480b4000ti,omap3-hsmmcH @Vmmc2Q/0Vtxrx disabledmmc@480ad000ti,omap3-hsmmcH ^mmc3QMNVtxrx disabledmmu@480bd400ti,omap2-iommuH mmu_isp disabledmmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1Q Vtxrxfck disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyssick+ H  disabledrng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetoneQ!"Vtxrxfckick disabledmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetoneQVtxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4QVtxrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5QVtxrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1QEVrxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss' fckick+ H1 timer@0ti,omap3430-timerfck%$4target-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss' fckick+ I  timer@0ti,omap3430-timer&$4timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5Ktimer@4903a000ti,omap3430-timerI*timer6Ktimer@4903c000ti,omap3430-timerI+timer7Ktimer@4903e000ti,omap3430-timerI,timer8XKtimer@49040000ti,omap3430-timerI-timer9Xtimer@48086000ti,omap3430-timerH`.timer10Xtimer@48088000ti,omap3430-timerH/timer11Xtarget-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss' fckick+ H0@timer@0ti,omap3430-timer_eusbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ohci@48064400ti,ohci-omap3HDLuehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcnQVrxtx+!1target-module@480ab000ti,sysc-omap2ti,syscH H H revsyscsyss  fck+ H  disabledusb@0ti,omap3-musb\]mcdma dss@48050000 ti,omap3-dssH disabled dss_corefck+dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH  disabled dss_vencfckssi-controller@48058000 ti,omap3-ssissi disabledHHsysgddGgdd_mpu+ssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFtarget-module@5c040000ti,sysc-omap2ti,sysc\\\revsyscsyss  zfck+ \am35x_otg_hs@0ti,omap3-musb disabledGmcethernet@5c000000ti,am3517-emac davinci_emacokay\CDEF| 5Hxickmdio@5c030000ti,davinci_mdio davinci_mdiookay\ZB@+fckserial@4809e000ti,omap3-uartuart4 disabledH TQ76Vtxrxlpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+%Ccan@5c050000ti,am3517-hecc disabled\\0\ hecchecc-rammbx|target-module@50000000ti,sysc-omap2ti,syscPrevfckick+ P@opp-tableoperating-points-v2-ti-cpu|topp-50-300000000cjOxopp-100-600000000c#FjOxmemory@80000000memoryfixedregulatorregulator-fixedvbatLK@LK@t compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3canethernetdevice_typeregclocksclock-namesclock-latencyoperating-points-v2interruptsti,hwmodsstatusranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesti,bit-shiftclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockreg-namesti,sysc-sidleti,sysc-maskti,sysc-midleti,syss-mask#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendeddmasdma-namespinctrl-namespinctrl-0ti,en-ck32k-xtalvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-compatibleregulator-always-onregulator-boot-on#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-width#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freqopp-hzopp-microvoltopp-supported-hwopp-suspend