-8(a6STMicroelectronics STM32MP157C-ED1 SCMI eval daughter&!st,stm32mp157c-ed1-scmist,stm32mp157cpuscpu@0!arm,cortex-a7,&6;rxtx  disabledaudio-controller@4000c000!st,stm32h7-i2syH@ [3 6=>;rxtx  disabledaudio-controller@4000d000!st,stm32h7-spdifrxyH@L*kclk [a 6]^ ;rxrx-ctrl  disabledserial@4000e000!st,stm32h7-uartH@ P Ld 6+,;rxtx  disabledserial@4000f000!st,stm32h7-uartH@ P Ld 6-.;rxtx  disabledserial@40010000!st,stm32h7-uartH@ P Ld okaydefaultsleepidle   serial@40011000!st,stm32h7-uartH@ P Ld 6AB;rxtx  disabledi2c@40012000!st,stm32mp15-i2cH@  eventerror[ LrL d  disabledi2c@40013000!st,stm32mp15-i2cH@0 eventerror[!"LrL d  disabledi2c@40014000!st,stm32mp15-i2cH@@ eventerror[HILrL d  disabledi2c@40015000!st,stm32mp15-i2cH@P eventerror[klLrL d  disabledcec@40016000 !st,stm32-cecH@` [^L *cechdmi-cec  disableddac@40017000!st,stm32h7-dac-coreH@pL*pclk  disableddefault dac@1 !st,stm32-dacH okaydac@2 !st,stm32-dacH okayserial@40018000!st,stm32h7-uartH@ P Ld 6OP;rxtx  disabledserial@40019000!st,stm32h7-uartH@ P !Ld 6QR;rxtx  disabledtimer@44000000!st,stm32-timersHD0[brkuptrg-comccL*intp6   ;ch1ch2ch3ch4uptrigcom  disabledpwm !st,stm32-pwmE  disabledtimer@0!st,stm32h7-timer-triggerH  disabledcounter!st,stm32-timer-counter  disabledtimer@44001000!st,stm32-timersHD0[+,-.brkuptrg-comccL*intp6/012345;ch1ch2ch3ch4uptrigcom  disabledpwm !st,stm32-pwmE  disabledtimer@7!st,stm32h7-timer-triggerH  disabledcounter!st,stm32-timer-counter  disabledserial@44003000!st,stm32h7-uartHD0 P Ld 6GH;rxtx  disabledspi@44004000!st,stm32h7-spiHD@ [#LrLH 6%&;rxtx  disabledaudio-controller@44004000!st,stm32h7-i2syHD@ [# 6%&;rxtx  disabledspi@44005000!st,stm32h7-spiHDP [TLrLI 6ST;rxtx  disabledtimer@44006000!st,stm32-timersHD` [tglobalL*int@6ijkl;ch1uptrigcom  disabledpwm !st,stm32-pwmE  disabledtimer@14!st,stm32h7-timer-triggerH  disabledtimer@44007000!st,stm32-timersHDp [uglobalL*int 6mn;ch1up  disabledpwm !st,stm32-pwmE  disabledtimer@15!st,stm32h7-timer-triggerH  disabledtimer@44008000!st,stm32-timersHD [vglobalL*int 6op;ch1up  disabledpwm !st,stm32-pwmE  disabledtimer@16!st,stm32h7-timer-triggerH  disabledspi@44009000!st,stm32h7-spiHD [ULrLJ 6UV;rxtx  disabledsai@4400a000!st,stm32h7-sai DHDD [WrLP  disabledaudio-controller@4400a004y!st,stm32-sai-sub-aH L*sai_ck6W  disabledaudio-controller@4400a024y!st,stm32-sai-sub-bH$ L*sai_ck6X  disabledsai@4400b000!st,stm32h7-sai DHDD [[rLQ  disabledaudio-controller@4400b004y!st,stm32-sai-sub-aH L*sai_ck6Y  disabledaudio-controller@4400b024y!st,stm32-sai-sub-bH$ L*sai_ck6Z  disabledsai@4400c000!st,stm32h7-sai DHDD [rrLR  disabledaudio-controller@4400c004y!st,stm32-sai-sub-aH L*sai_ck6q  disabledaudio-controller@4400c024y!st,stm32-sai-sub-bH$ L*sai_ck6r  disableddfsdm@4400d000!st,stm32mp1-dfsdmHDL*dfsdm  disabledfilter@0!st,stm32-dfsdm-adcH [n6e;rx  disabledfilter@1!st,stm32-dfsdm-adcH [o6f;rx  disabledfilter@2!st,stm32-dfsdm-adcH [p6g;rx  disabledfilter@3!st,stm32-dfsdm-adcH [q6h;rx  disabledfilter@4!st,stm32-dfsdm-adcH [s6[;rx  disabledfilter@5!st,stm32-dfsdm-adcH [~6\;rx  disableddma-controller@48000000 !st,stm32-dmaHH`[   /LGrL Sdma-controller@48001000 !st,stm32-dmaHH`[89:;<DEFLHrL Sdma-router@48002000!st,stm32h7-dmamuxHH @ #LIrLSadc@48003000!st,stm32mp1-adc-coreHH0[ZLJ*busadc  disableddefault0;Sadc@0!st,stm32mp1-adcHy[6 ;rx okaychannel@0HGchannel@1HGchannel@6HGadc@100!st,stm32mp1-adcHy[6 ;rx]ivrefint  disabledchannel@13H zvrefintchannel@14Hzvddcoremmc@48004000(!st,stm32-sdmmc2arm,pl18xarm,primecell%1HH@ [Lx *apb_pclkrL'  disabledusb-otg@49000000!st,stm32mp15-hsotgsnps,dwc2HI L *otgutmirLdwc2 [b  otg   disabled"mailbox@4c001000!st,stm32mp1-ipcc.HL:P =erxtxLSd okayS@dcmi@4c006000!st,stm32-dcmiHL` [NrMLM*mclk6K;tx  disabledrcc@50000000!st,stm32mp1-rcc-securesysconHPER*hsehsicsilselsi(LSpwr@50001000!st,stm32mp1,pwr-regHP0_reg11treg11  disabledreg18treg18w@w@  disabledS7usb33tusb332Z2Z  disabledpwr_mcu@50001014!st,stm32mp151-pwr-mcusysconHPS8interrupt-controller@5000d000!st,stm32mp1-extisysconHPS syscon@50020000!st,stm32mp157-syscfgsysconHPL3Stimer@50021000!st,stm32-lptimerHP P 0L*muxd  disabledpwm!st,stm32-pwm-lpE  disabledtrigger@1!st,stm32-lptimer-triggerH  disabledcounter!st,stm32-lptimer-counter  disabledtimer@50022000!st,stm32-lptimerHP  P 2L*muxd  disabledpwm!st,stm32-pwm-lpE  disabledtrigger@2!st,stm32-lptimer-triggerH  disabledtimer@50023000!st,stm32-lptimerHP0 P 4L*muxd  disabledpwm!st,stm32-pwm-lpE  disabledtimer@50024000!st,stm32-lptimerHP@ P 5L*muxd  disabledpwm!st,stm32-pwm-lpE  disabledvrefbuf@50025000!st,stm32-vrefbufHPP`&%L4  disabledsai@50027000!st,stm32h7-sai PpHPpPs [rL  disabledaudio-controller@50027004y!st,stm32-sai-sub-aH L*sai_ck6c  disabledaudio-controller@50027024y!st,stm32-sai-sub-bH$ L*sai_ck6d  disabledthermal@50028000!st,stm32-thermalHP [L5*pclk okayShash@54002000!st,stm32f756-hashHT  [PL r6 ;in okayrng@54003000 !st,stm32-rngHT0Lr okaydma-controller@58000000!st,stm32h7-mdmaHX [zLdr #  0Smemory-controller@58002000!st,stm32mp1-fmc2-ebiHX Lyr   disabledP`dhlnand-controller@4,0!st,stm32mp1-fmc2-nfcHH   [0H6    ;txrxecc  disabledspi@58003000!st,stm32f469-qspiHX0p qspiqspi_mm [\06;txrxLzr   disabledmmc@58005000(!st,stm32-sdmmc2arm,pl18xarm,primecell%1HXP [1Lv *apb_pclkr ' okaydefaultopendrainsleep  ! !"-#:GTammc@58007000(!st,stm32-sdmmc2arm,pl18xarm,primecell%1HXp [|Lw *apb_pclkr ' okaydefaultopendrainsleep$%&%'(n|!)-crc@58009000!st,stm32f7-crcHXLn okayethernet@5800a000#!st,stm32mp1-dwmacsnps,dwmac-4.20aHX  stmmacethP=macirq6*stmmacethmac-clk-txmac-clk-rxeth-ckptp_refethstp0Ligh{p*  disabledstmmac-axi-configS*usb@5800c000 !generic-ohciHX Lor  [J+usb  disabledS,usb@5800d000 !generic-ehciHX Lor  [K(,+usb  disableddisplay-controller@5a001000!st,stm32-ltdcHZ[XYL*lcdr   disabledwatchdog@5a002000!st,stm32mp1-iwdgHZ L: *pclklsi okay2 usbphyc@5a006000E!st,stm32mp1-usbphycHZ`Lr >-M.  disabledSusb-phy@0\HgS+usb-phy@1\Hgserial@5c000000!st,stm32h7-uartH\ P Ld  disabledspi@5c001000!st,stm32h7-spiH\ [VLr @06"#;rxtx  disabledi2c@5c002000!st,stm32mp15-i2cH\  eventerror[_`L r d okaydefaultsleep/0r,stpmic@33 !st,stpmic1H3 P1 okayregulators!st,stpmic1-regulators2222))32))2-2:4I4buck1tvddcoreOpXlbuck2tvdd_ddrppXlS3buck3tvdd2Z2ZXlSbuck4tv3v32Z2ZXlS)ldo1tvdda,@ ,@ [Sldo2tv2v8**[ldo3tvtt_ddr  qXldo4tvdd_usb[Sldo5tvdd_sd,@ ,@ [S"ldo6tv1v8w@w@[vref_ddr tvref_ddrXboosttbst_out[S4pwr_sw1 tvbus_otg[ Spwr_sw2tvbus_sw[ onkey!st,stpmic1-onkey[onkey-fallingonkey-rising  okaywatchdog!st,stpmic1-wdt  disabledrtc@5c004000!st,stm32mp1-rtcH\@L *pclkrtc_ck P  okayefuse@5c005000!st,stm32mp15-bsecH\Ppart-number-otp@4Hvrefin-cal@52HRScalib@5cH\calib@5eH^i2c@5c009000!st,stm32mp15-i2cH\ eventerror[Lr C  d  disabledtamp@5c00a000 !st,stm32-tampsysconsimple-mfdH\S9pinctrl@50002000!st,stm32mp157-pinctrl P y   `S5gpio@50002000HLTGPIOA okay'.5S1gpio@50003000HLUGPIOB okay'.5gpio@50004000H LVGPIOC okay'.5 gpio@50005000H0LWGPIOD okay'.50gpio@50006000H@LXGPIOE okay'.5@gpio@50007000HPLYGPIOF okay'.5PSAgpio@50008000H`LZGPIOG okay'.5`S!gpio@50009000HpL[GPIOH okay'.5pgpio@5000a000HL\GPIOI okay'.5gpio@5000b000HL]GPIOJ okay'.5gpio@5000c000HL^GPIOK okay'.5adc1-in6-0Spins:\dac-ch1-0S pins:dac-ch2-0Spins:sdmmc1-b4-0Spins1:( ) * + 2 AK[pins2:, AK[sdmmc1-b4-od-0Spins1:( ) * + AK[pins2:, AK[pins3:2 Ah[sdmmc1-b4-sleep-0Spins:()*+,2sdmmc1-dir-0Spins1 :R '  AKypins2:D ysdmmc1-dir-sleep-0S pins:R'Dsdmmc2-b4-0S$pins1:    f AKypins2:C AKysdmmc2-b4-od-0S&pins1:    AKypins2:C AKypins3:f Ahysdmmc2-b4-sleep-0S'pins:Cfsdmmc2-d47-0S%pins: E 3 AKysdmmc2-d47-sleep-0S(pins: E3uart4-0S pins1:k[KApins2: [uart4-idle-0S pins1:kpins2: [uart4-sleep-0S pins:kpinctrl@54004000!st,stm32mp157-z-pinctrl T@y   `S6gpio@54004000HL GPIOZ  okay'.6i2c4-0S/pins:[hAi2c4-sleep-0S0pins:can@4400e000 !bosch,m_canHDDm_canmessage_ram[ int0int1L *hclkcclk    disabledcan@4400f000 !bosch,m_canHDD(m_canmessage_ram[ int0int1L *hclkcclk    disabledgpu@59000000 !vivante,gcHY [mLe~ *buscorer dsi@5a000000 !st,stm32-dsiHZL*pclkrefpx_clk7r apb  disabledportsport@0Hendpointport@1Hendpointcryp@54001000!st,stm32mp1-crypHT [OL r okayahb!st,mlahbsimple-bus$800m4@10000000!st,stm32mp1-m4H08r  mcu_rsthold_boot 8 9D 9H okay:;<=>? @@@@vq0vq1shutdowndetachy [Daliases/soc/serial@40010000chosenserial0:115200n8memory@c0000000vdev0buffer@10042000!shared-dma-poolH @&S?mcuram@30000000!shared-dma-poolH0&S;retram@38000000!shared-dma-poolH8&S:optee@fe000000H&regulator-sd_switch!regulator-gpio tsd_switchw@,@ -voltageX A<Bw@,@ S#vin!regulator-fixedtvinLK@LK@XS2firmwareoptee!linaro,optee-tzsmcscmi!linaro,scmi-opteeIprotocol@14HESprotocol@16HRSprotocol@17Hregulatorsregulator@0Htreg11S-regulator@1Htreg18w@w@S.regulator@2Htusb332Z2ZS #address-cells#size-cellsmodelcompatibleclock-frequencydevice_typeregclocksphandleinterruptsinterrupt-affinityinterrupt-parentmethod#interrupt-cellsinterrupt-controllerpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisst,syscfgstatusrangesinterrupt-namesclock-namesdmasdma-names#pwm-cellsinterrupts-extendedwakeup-sourceresets#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1pinctrl-2st,syscfg-fmpi2c-analog-filtervref-supply#io-channel-cells#dma-cellsst,mem2memdma-requestsdma-mastersdma-channelsvdd-supplyvdda-supplyst,min-sample-time-nsnvmem-cellsnvmem-cell-nameslabelarm,primecell-periphidcap-sd-highspeedcap-mmc-highspeedmax-frequencyreset-namesg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-sizedr_modeotg-revusb33d-supplyvbus-supply#mbox-cellsst,proc-id#clock-cells#reset-cellsvdd_3v3_usbfs-supplyregulator-nameregulator-min-microvoltregulator-max-microvolt#thermal-sensor-cellsdma-maxburstreg-namescd-gpiosdisable-wpst,sig-dirst,neg-edgest,use-ckinbus-widthvmmc-supplyvqmmc-supplysd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-ddr50non-removableno-sdno-sdiommc-ddr-3_3vst,sysconsnps,mixed-burstsnps,pblsnps,en-tx-lpi-clockgatingsnps,axi-configsnps,tsosnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blenphysphy-namescompaniontimeout-secvdda1v1-supplyvdda1v8-supply#phy-cellsphy-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsbuck1-supplybuck2-supplybuck3-supplybuck4-supplyldo1-supplyldo2-supplyldo3-supplyldo4-supplyldo5-supplyldo6-supplyvref_ddr-supplyboost-supplypwr_sw1-supplypwr_sw2-supplyregulator-always-onregulator-initial-moderegulator-over-current-protectionst,mask-resetregulator-boot-onregulator-active-dischargepower-off-time-secst,packagegpio-controller#gpio-cellsst,bank-namengpiosgpio-rangespinmuxslew-ratedrive-push-pullbias-disabledrive-open-drainbias-pull-upst,bank-ioportbosch,mram-cfgphy-dsi-supplydma-rangesst,syscfg-pddsst,syscfg-rsc-tblst,syscfg-m4-statememory-regionmboxesmbox-namesserial0stdout-pathno-mapregulator-typegpios-stateslinaro,optee-channel-id