8`( "($$,8FSony Xperia XZ1 CompactLsony,xperia-lilacqcom,msm8998Whandsetchosenmemory@80000000dmemorypreserved-memory,tmemory@85800000pp{memory@85e00000p{smem-mem@86000000p {memory@86200000p {memory@88f00000Lqcom,rmtfs-memp {memory@8ab00000pp{memory@8b200000p {memory@8cc00000p{/memory@93c00000pP{memory@94100000p {.memory@94300000p0{6memory@95200000p {memory@95210000p!P{memory@95600000p`{memory@95700000pp{mpss-metadata @{0memory@9d400000p@@{memory@f6400000Lshared-dma-poolp@ {memory@fe000000p{memory@fe800000p@{ramoops@ffc00000Lramoopspclocksxo-board Lfixed-clock$  xo_boardsleep-clk Lfixed-clock!divclk1Lgpio-gate-clock'default5. < cpus,cpu@0dcpu Lqcom,kryo280pIpsciWjz l2-cacheLcachecpu@1dcpu Lqcom,kryo280pIpsciWjz cpu@2dcpu Lqcom,kryo280pIpsciWjz cpu@3dcpu Lqcom,kryo280pIpsciWjzcpu@100dcpu Lqcom,kryo280pIpsciWj z l2-cacheLcache cpu@101dcpu Lqcom,kryo280pIpsciWj z cpu@102dcpu Lqcom,kryo280pIpsciWj z cpu@103dcpu Lqcom,kryo280pIpsciWj z cpu-mapcluster0core0 core1 core2 core3cluster1core0core1core2core3idle-statespscicpu-sleep-0-0Larm,idle-statelittle-retentionQVcpu-sleep-0-1Larm,idle-statelittle-power-collapse@.#cpu-sleep-1-0Larm,idle-statebig-retentionORcpu-sleep-1-1Larm,idle-statebig-power-collapse@$ firmwarescmLqcom,scm-msm8998qcom,scmpsci Larm,psci-1.0Psmcrpm-glinkLqcom,glink-rpm  +<rpm-requestsLqcom,rpm-msm8998 Crpm_requestsclock-controllerLqcom,rpmcc-msm8998qcom,rpmccpower-controllerLqcom,msm8998-rpmpdWk-opp-tableLoperating-points-v2opp1opp2 opp30opp4@opp5opp6opp7opp8@opp9opp10regulators-0Lqcom,rpm-pm8998-regulators%4CUj|*9s3N@f@s4Nw@fw@~s5N fs7N fl1N mf m~&l2NOfO~1'l3NB@fB@l5N 5f 5l6Nw@fw@l7Nw@fw@il8NOfOl9Nf-*l10Nf-*l11NB@fB@l12Nw@fw@`l13Nf-*cl14N2fR~}l15Nw@fw@l16N)Bf)Bl17Nfjl18l19N)#@f)Bl20N-*f-*~'l21N-*f-*~ 5bl22N*f*l23N2f2l24N/f/al25N/]f2kl26NOfOl28N-f-wlvs1 disabledlvs25regulators-1Lqcom,rpm-pmi8998-regulatorsbobN2f6smem Lqcom,smemsmp2p-lpass Lqcom,smp2p  < master-kernelmaster-kernelslave-kernel slave-kernel)>smp2p-mpss Lqcom,smp2p  <master-kernelmaster-kernel+slave-kernel slave-kernel)>*smp2p-slpi Lqcom,smp2p  <master-kernelmaster-kernel7slave-kernel slave-kernel)>4thermal-zonescpu0-thermalOestripstrip-point0$_passivecpu-crit _criticalcpu1-thermalOestripstrip-point0$_passivecpu-crit _criticalcpu2-thermalOestripstrip-point0$_passivecpu-crit _criticalcpu3-thermalOestripstrip-point0$_passivecpu-crit _criticalcpu4-thermalOestripstrip-point0$_passivecpu-crit _criticalcpu5-thermalOestripstrip-point0$_passivecpu-crit _criticalcpu6-thermalOes tripstrip-point0$_passivecpu-crit _criticalcpu7-thermalOes tripstrip-point0$_passivecpu-crit _criticalgpu-bottom-thermalOes tripstrip-point0__hotgpu-top-thermalOes tripstrip-point0__hotclust0-mhm-thermalOestripstrip-point0__hotclust1-mhm-thermalOestripstrip-point0__hotcluster1-l2-thermalOes tripstrip-point0__hotmodem-thermalOestripstrip-point0__hotmem-thermalOestripstrip-point0__hotwlan-thermalOestripstrip-point0__hotq6-dsp-thermalOestripstrip-point0__hotcamera-thermalOestripstrip-point0__hotmultimedia-thermalOestripstrip-point0__hotpm8998-thermalOes tripspm8998-alert0(_passivepm8998-critH _criticaltimerLarm,armv8-timer0 soc@0,t Lsimple-busclock-controller@100000Lqcom,gcc-msm8998Wp  xosleep_clk 5! #sram@778000Lqcom,rpm-msg-rampwpqfprom@784000 Lqcom,msm8998-qfpromqcom,qfprompx@b,hstx-trim@23ap:_thermal@10ab000!Lqcom,msm8998-tsensqcom,tsens-v2p   uplowcriticalthermal@10ae000!Lqcom,msm8998-tsensqcom,tsens-v2p   uplowcriticaliommu@1680000"Lqcom,msm8998-smmu-v2qcom,smmu-v2ph H lmnopq$iommu@16c0000"Lqcom,msm8998-smmu-v2qcom,smmu-v2pl x uvwxyzpci@1c00000$Lqcom,pcie-msm8998qcom,pcie-msm8996 p  parfdbielbiconfigdpci'8,BL"Qpciephy disabled0t 00>  msi[n(5#^#[#\#]#_"pipeauxcfgbus_masterbus_slave|#$ %#phy@1c06000Lqcom,msm8998-qmp-pcie-phyp`, disabledt5#`#\#auxcfg_ahbref#L#N phycommon&'phy@1c06800pb(dh 5#^pipe0 pcie_0_pipe_clk_src"ufshc@1da4000,Lqcom,msm8998-ufshcqcom,ufshcjedec,ufs-2.0p@%   L(Qufsphy|# disabledncore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@5#m##l#sP#r#p#q@ <4`р#rst)phy@1da7000Lqcom,msm8998-qmp-ufs-phypp, disabledt refref_aux5##oufsphy)phy@1da7400(pt(v|x(z(hwlock@1f40000Lqcom,tcsr-mutexpsyscon@1f60000Lqcom,msm8998-tcsrsysconp,pinctrl@3400000Lqcom,msm8998-pinctrlp@  %*)>6Q"KDEBUG_UART_TXDEBUG_UART_RXCAMSENSOR_I2C_SDACAMSENSOR_I2C_SCLNCNCMDP_VSYNC_PRGBC_IR_INTNFC_VENCAM_MCLK0CAM_MCLK1NCNCCCI_I2C_SDA0CCI_I2C_SCL0CCI_I2C_SDA1CCI_I2C_SCL1MAIN_CAM_PWR_ENTOF_INT_NNCNCCHAT_CAM_PWR_ENNCTOF_RESET_NCAM2_RSTNNCCAM1_RSTNNCNCNCNCNCNCNCCC_DIRUIM2_DETECT_ENFP_RESET_NNCNCNCNCBT_HCI_UART_TXDBT_HCI_UART_RXDBT_HCI_UART_CTS_NBT_HCI_UART_RFR_NNCNCNCNCCODEC_INT2_NCODEC_INT1_NAPPS_I2C_SDAAPPS_I2C_SCLFORCED_USB_BOOTNCNCNCNCNCTRAY2_DET_DSCODEC_RST_NWSA_L_ENWSA_R_ENNCNCNCLPASS_SLIMBUS_CLKLPASS_SLIMBUS_DATA0LPASS_SLIMBUS_DATA1BT_FM_SLIMBUS_DATABT_FM_SLIMBUS_CLKNCRF_LCD_ID_ENNCNCNCNCSW_SERVICETX_GTR_THRES_INHW_ID0HW_ID1NCNCTS_I2C_SDATS_I2C_SCLTS_RESET_NNCNCNFC_IRQNFC_DWLD_ENDISP_RESET_NTRAY2_DETCAM_SOFRFFE6_CLKRFFE6_DATADEBUG_GPIO0DEBUG_GPIO1GRFC4NCNCRSVDUIM2_DATAUIM2_CLKUIM2_RESETUIM2_PRESENTUIM1_DATAUIM1_CLKUIM1_RSTUIM1_PRESENTUIM_BATT_ALARMRSVDNCNCACCEL_INTGYRO_INTCOMPASS_INTALS_PROX_INT_NFP_INT_NNCBAROMETER_INTACC_COVER_OPENTS_INT_NNCNCUSB_DETECT_ENNCQLINK_REQUESTQLINK_ENABLENCNCWMSS_RESET_NPA_INDICATOR_ORNCRFFE3_DATARFFE3_CLKRFFE4_DATARFFE4_CLKRFFE5_DATARFFE5_CLKGNSS_ENMSS_LTE_COXM_TXDMSS_LTE_COXM_RXDRFFE2_DATARFFE2_CLKRFFE1_DATARFFE1_CLK%sdc2-on-statedclk-pins [sdc2_clk`ocmd-pins [sdc2_cmd` |data-pins [sdc2_data` |sdc2-off-statefclk-pins [sdc2_clk`ocmd-pins [sdc2_cmd`|data-pins [sdc2_data`|sdc2-cd-state[gpio95gpio|`eblsp1-uart3-on-statehtx-pins[gpio45 blsp_uart3_a`orx-pins[gpio46 blsp_uart3_a`octs-pins[gpio47 blsp_uart3_a`orfr-pins[gpio48 blsp_uart3_a`oblsp1-i2c1-default-state [gpio2gpio3 blsp_i2c1`olblsp1-i2c1-sleep-state-state [gpio2gpio3 blsp_i2c1`|mblsp1-i2c2-default-state[gpio32gpio33 blsp_i2c2`onblsp1-i2c2-sleep-state-state[gpio32gpio33 blsp_i2c2`|oblsp1-i2c3-default-state[gpio47gpio48 blsp_i2c3`opblsp1-i2c3-sleep-state[gpio47gpio48 blsp_i2c3`|qblsp1-i2c4-default-state[gpio10gpio11 blsp_i2c4`orblsp1-i2c4-sleep-state[gpio10gpio11 blsp_i2c4`|sblsp1-i2c5-default-state[gpio87gpio88 blsp_i2c5`otblsp1-i2c5-sleep-state[gpio87gpio88 blsp_i2c5`|oublsp1-i2c6-default-state[gpio43gpio44 blsp_i2c6`oyblsp1-i2c6-sleep-state[gpio43gpio44 blsp_i2c6`|zblsp1-spi-b-default-state[gpio23gpio28 blsp1_spi_b`oblsp1-spi1-default-state[gpio0gpio1gpio2gpio3 blsp_spi1`o{blsp1-spi2-default-state[gpio31gpio34gpio32gpio33 blsp_spi2`o|blsp1-spi3-default-state[gpio45gpio46gpio47gpio48 blsp_spi2`o}blsp1-spi4-default-state[gpio8gpio9gpio10gpio11 blsp_spi4`o~blsp1-spi5-default-state[gpio85gpio86gpio87gpio88 blsp_spi5`oblsp1-spi6-default-state[gpio41gpio42gpio43gpio44 blsp_spi6`oblsp2-i2c1-default-state[gpio55gpio56 blsp_i2c7`oblsp2-i2c1-sleep-state[gpio55gpio56 blsp_i2c7`|blsp2-i2c2-default-state [gpio6gpio7 blsp_i2c8`oblsp2-i2c2-sleep-state [gpio6gpio7 blsp_i2c8`|blsp2-i2c3-default-state[gpio51gpio52 blsp_i2c9`oblsp2-i2c3-sleep-state[gpio51gpio52 blsp_i2c9`|blsp2-i2c4-default-state[gpio67gpio68 blsp_i2c10`oblsp2-i2c4-sleep-state[gpio67gpio68 blsp_i2c10`|blsp2-i2c5-default-state[gpio60gpio61 blsp_i2c11`oblsp2-i2c5-sleep-state[gpio60gpio61 blsp_i2c11`|blsp2-i2c6-default-state[gpio83gpio84 blsp_i2c12`oblsp2-i2c6-sleep-state[gpio83gpio84 blsp_i2c12`|blsp2-spi1-default-state[gpio53gpio54gpio55gpio56 blsp_spi7`oblsp2-spi2-default-state[gpio4gpio5gpio6gpio7 blsp_spi8`oblsp2-spi3-default-state[gpio49gpio50gpio51gpio52 blsp_spi9`oblsp2-spi4-default-state[gpio65gpio66gpio67gpio68 blsp_spi10`oblsp2-spi5-default-state[gpio58gpio59gpio60gpio61 blsp_spi11`oblsp2-spi6-default-state[gpio81gpio82gpio83gpio84 blsp_spi12`omdp-vsync-p-state[gpio10 mdp_vsync_a`nfc-ven-state[gpio12gpioo`cam-mclk0-active-state[gpio13 cam_mclk`ocam-mclk1-active-state[gpio14 cam_mclk`occi0-default-state[gpio18gpio19cci_i2co`cci1-default-state[gpio19gpio20cci_i2co`main-cam-pwr-en-default-state[gpio21gpioo`tof-int-n-state[gpio22gpio|`chat-cam-pwr-en-default-state[gpio25gpioo`tof-reset-state[gpio27gpioo`cc-dir-active-state[gpio38gpioo`acc-cover-open-state[gpio124gpioo`ts-int-n-state[gpio125gpio`|vusb-detect-en-active-state[gpio128gpioo`ts-vddio-en-default-state[gpio133gpioo`remoteproc@4080000Lqcom,msm8998-mss-pilp  qdsp6rmbL*****0wdogfatalreadyhandoverstop-ackshutdown-ack@5##$####2ifacebusmemgpll0_msssnoc_aximnoc_axiqdssxo+stop#l mss_restart,0P@|--cxmx disabledmba.mpss/metadata0glink-edge   modem<gpu@5000000Lqcom,adreno-540.1qcom,adrenopkgsl_3d0_reg_memory05#M1##K11)ifacerbbmtimermemmem_ifacerbcprcore  ,2k3|- disabledopp-tableLoperating-points-v23opp-710000097*Qopp-670000048'c@opp-596000097#=aopp-515000097G!opp-414000000#opp-342000000b@opp-257000000Q@0iommu@5040000"Lqcom,msm8998-smmu-v2qcom,smmu-v2p5#M##Kifacememmem_iface $ IJK|1 disabled2clock-controller@5065000Lqcom,msm8998-gpuccWpP5# xogpll01remoteproc@5800000Lqcom,msm8998-slpi-pasp@@@4444#wdogfatalreadyhandoverstop-ack.55@ xoaggre267stop|-ssc_cx disabledglink-edge   dsps<stm@6002000 Larm,coresight-stmarm,primecellp (stm-basestm-stimulus-base disabled5 apb_pclkatclkout-portsportendpoint88:funnel@6041000+Larm,coresight-dynamic-funnelarm,primecellp disabled5 apb_pclkatclkout-portsportendpoint89>in-ports,port@7pendpoint8:8funnel@6042000+Larm,coresight-dynamic-funnelarm,primecellp  disabled5 apb_pclkatclkout-portsportendpoint8;?in-ports,port@6pendpoint8<Rfunnel@6045000+Larm,coresight-dynamic-funnelarm,primecellpP disabled5 apb_pclkatclkout-portsportendpoint8=Cin-ports,port@0pendpoint8>9port@1pendpoint8?;replicator@6046000/Larm,coresight-dynamic-replicatorarm,primecellp` disabled5 apb_pclkatclkout-portsportendpoint8@Din-portsportendpoint8ABetf@6047000 Larm,coresight-tmcarm,primecellpp disabled5 apb_pclkatclkout-portsportendpoint8BAin-portsportendpoint8C=etr@6048000 Larm,coresight-tmcarm,primecellp disabled5 apb_pclkatclkHin-portsportendpoint8D@etm@7840000"Larm,coresight-etm4xarm,primecellp disabled5 apb_pclkatclk out-portsportendpoint8EJetm@7940000"Larm,coresight-etm4xarm,primecellp disabled5 apb_pclkatclk out-portsportendpoint8FKetm@7a40000"Larm,coresight-etm4xarm,primecellp disabled5 apb_pclkatclk out-portsportendpoint8GLetm@7b40000"Larm,coresight-etm4xarm,primecellp disabled5 apb_pclkatclkout-portsportendpoint8HMfunnel@7b60000"Larm,coresight-etm4xarm,primecellp disabled5 apb_pclkatclkout-portsportendpoint8ISin-ports,port@0pendpoint8JEport@1pendpoint8KFport@2pendpoint8LGport@3pendpoint8MHport@4pendpoint8NTport@5pendpoint8OUport@6pendpoint8PVport@7pendpoint8QWfunnel@7b70000+Larm,coresight-dynamic-funnelarm,primecellp disabled5 apb_pclkatclkout-portsportendpoint8R<in-portsportendpoint8SIetm@7c40000"Larm,coresight-etm4xarm,primecellp disabled5 apb_pclkatclkportendpoint8TNetm@7d40000"Larm,coresight-etm4xarm,primecellp disabled5 apb_pclkatclkportendpoint8UOetm@7e40000"Larm,coresight-etm4xarm,primecellp disabled5 apb_pclkatclkportendpoint8VPetm@7f40000"Larm,coresight-etm4xarm,primecellp disabled5 apb_pclkatclkportendpoint8WQsram@290000Lqcom,rpm-statsp)spmi@800f000Lqcom,spmi-pmic-arb(p@ @ @"0corechnlsobsrvrintrcnfg periph_irq  F[c,)>pmic@4Lqcom,pm8005qcom,spmi-pmicp,gpio@c000 Lqcom,pm8005-gpioqcom,spmi-gpiopX*)>KNCNCSLBOPTION_1_PM8005Xpmic@5Lqcom,pm8005qcom,spmi-pmicp,regulatorsLqcom,pm8005-regulatorss1Nfppmic@0Lqcom,pm8998qcom,spmi-pmicp,pon@800Lqcom,pm8998-ponppwrkeyLqcom,pm8941-pwrkey = |tresinLqcom,pm8941-resin = |okaystemp-alarm@2400Lqcom,spmi-temp-alarmp$ $Ythermal charger@2800*Lqcom,pm8998-coincellqcom,pm8941-coincellp( disabledadc@3100Lqcom,spmi-adc-rev2p1 1,Yadc-chan@6p  die_tempadc-tm@3400Lqcom,spmi-adc-tm-hcp4 4, disabledrtc@6000Lqcom,pm8941-rtcp`a rtcalarm agpio@c000 Lqcom,pm8998-gpioqcom,spmi-gpiop*)>KUIM_BATT_ALARMNCWLAN_SW_CTRL (DISALLOWED)SSC_PWR_ENVOL_DOWN_NVOL_UP_NSNAPSHOT_NFOCUS_NFLASH_THERMDIV_CLK1NCNC (DISALLOWED)DIV_CLK3NCNCNCNC (DISALLOWED)NFC_CLK_REQNC (DISALLOWED)WCSS_PWR_REQOPTION_1 (DISALLOWED)OPTION_2 (DISALLOWED)PM_SLB (DISALLOWED)vol-down-n-state[gpio5normal|  focus-n-state[gpio7normal|  snapshot-n-state[gpio8normal|  div-clk1-state[gpio13func2 "pmic@1Lqcom,pm8998qcom,spmi-pmicp,pmic@2Lqcom,pmi8998qcom,spmi-pmicp,charger@1000Lqcom,pmi8998-chargerp@ -usb-pluginbat-ovwdog-barkusbin-icl-changeZZusbin_iusbin_v disabledgpio@c000!Lqcom,pmi8998-gpioqcom,spmi-gpiop[*)>lKMAIN_CAM_PWR_IO_ENNCNCTYPEC_UUSB_SELVIB_LDO_ENNCDISPLAY_TYPE_SELNCNCNCNCDIV_CLK3SPMI_I2C_SELNC[main-cam-pwr-io-en-state[gpio1normalo /  "vib-ldo-en-state[gpio5normalo /  "adc@4500Lqcom,pmi8998-rradcpEZpmic@3Lqcom,pmi8998qcom,spmi-pmicp,labibbLqcom,pmi8998-lab-ibbibb   sc-errocp ? 5 V 5p m   X   ,NS`fS`lab   sc-errocp ? @ V @p m   P  NS`fS` ) pwmLqcom,pmi8998-lpg, < disabledled-controller@d300+Lqcom,pmi8998-flash-ledqcom,spmi-flash-ledp disabledleds@d800Lqcom,pmi8998-wledp   ovpshort  backlight disabledusb@a8f8800Lqcom,msm8998-dwc3qcom,dwc3p okay,t(5#G#t# #v#u#cfg_noccoreifacesleepmock_utmi G#u#t W$' [hs_phy_irqss_phy_irq|##usb@a800000 Lsnps,dwc3p    l L\]Qusb2-phyusb3-phy   peripheral ^phy@c010000Lqcom,msm8998-qmp-usb3-phyp okay,t5#w#y#auxcfg_ahbref#E#F phycommon&'phy@c010200(p (    ( 5#xpipe0 usb3_phy_pipe_clk_src]phy@c012000Lqcom,msm8998-qusb2-phyp  okay5#y# cfg_ahbref#j _` a\mmc@c0a4900%Lqcom,msm8998-sdhciqcom,sdhci-msm-v4p I @hccore }hc_irqpwr_irqifacecorexo5#e#f okay %_ b c'defaultsleepde "fedma-controller@c144000Lqcom,bam-v1.7.0p @P  5#%bam_clk ,[ 7 P ]gserial@c171000%Lqcom,msm-uartdm-v1.4qcom,msm-uartdmp   m5#5#% coreiface jgg otxrx'defaulthokaybluetoothLqcom,wcn3990-bt y i j k 05i2c@c175000Lqcom,i2c-qup-v2.2.1p P  _5#&#% coreiface jgg otxrx'defaultsleepl "m disabled,i2c@c176000Lqcom,i2c-qup-v2.2.1p `  `5#(#% coreiface jgg  otxrx'defaultsleepn "o disabled,i2c@c177000Lqcom,i2c-qup-v2.2.1p p  a5#*#% coreiface jg g  otxrx'defaultsleepp "q disabled,i2c@c178000Lqcom,i2c-qup-v2.2.1p   b5#,#% coreiface jg g  otxrx'defaultsleepr "s disabled,i2c@c179000Lqcom,i2c-qup-v2.2.1p   c5#.#% coreiface jgg otxrx'defaultsleept "ujokay,touchscreen@2cLsyna,rmi4-i2cp,, %}'defaultv w x  rmi4-f01@1p rmi4-f11@11p i2c@c17a000Lqcom,i2c-qup-v2.2.1p   d5#0#% coreiface jgg otxrx'defaultsleepy "z disabled,spi@c175000Lqcom,spi-qup-v2.2.1p P  _5#'#% coreiface jgg otxrx'default{ disabled,spi@c176000Lqcom,spi-qup-v2.2.1p `  `5#)#% coreiface jgg  otxrx'default| disabled,spi@c177000Lqcom,spi-qup-v2.2.1p p  a5#+#% coreiface jg g  otxrx'default} disabled,spi@c178000Lqcom,spi-qup-v2.2.1p   b5#-#% coreiface jg g  otxrx'default~ disabled,spi@c179000Lqcom,spi-qup-v2.2.1p   c5#/#% coreiface jgg otxrx'default disabled,spi@c17a000Lqcom,spi-qup-v2.2.1p   d5#1#% coreiface jgg otxrx'default disabled,dma-controller@c184000Lqcom,bam-v1.7.0p @P  5#6bam_clk ,[ 7 P ]serial@c1b0000%Lqcom,msm-uartdm-v1.4qcom,msm-uartdmp   r5#E#6 coreifaceokayi2c@c1b5000Lqcom,i2c-qup-v2.2.1p P  e5#7#6 coreiface j otxrx'defaultsleep " disabled,i2c@c1b6000Lqcom,i2c-qup-v2.2.1p `  f5#9#6 coreiface j  otxrx'defaultsleep "okay,proximity@29 Lst,vl53l0xp)%  % 'defaulti2c@c1b7000Lqcom,i2c-qup-v2.2.1p p  g5#;#6 coreiface j  otxrx'defaultsleep " disabled,i2c@c1b8000Lqcom,i2c-qup-v2.2.1p   h5#=#6 coreiface j  otxrx'defaultsleep " disabled,i2c@c1b9000Lqcom,i2c-qup-v2.2.1p   i5#?#6 coreiface j otxrx'defaultsleep " disabled,i2c@c1ba000Lqcom,i2c-qup-v2.2.1p   j5#A#6 coreiface j otxrx'defaultsleep " disabled,spi@c1b5000Lqcom,spi-qup-v2.2.1p P  e5#8#6 coreiface j otxrx'default disabled,spi@c1b6000Lqcom,spi-qup-v2.2.1p `  f5#:#6 coreiface j  otxrx'default disabled,spi@c1b7000Lqcom,spi-qup-v2.2.1p p  g5#<#6 coreiface j  otxrx'default disabled,spi@c1b8000Lqcom,spi-qup-v2.2.1p   h5#>#6 coreiface j  otxrx'default disabled,spi@c1b9000Lqcom,spi-qup-v2.2.1p   i5#@#6 coreiface j otxrx'default disabled,spi@c1ba000Lqcom,spi-qup-v2.2.1p   j5#B#6 coreiface j otxrx'default disabled,clock-controller@c8c0000Lqcom,mmcc-msm8998Wp @xogpll0dsi0dsidsi0bytedsi1dsidsi1bytehdmiplldplinkdpvco,5#iommu@cd00000"Lqcom,msm8998-smmu-v2qcom,smmu-v2p 5iface-mmiface-smmubus-smmu     | remoteproc@17300000Lqcom,msm8998-adsp-pasp0@@@#wdogfatalreadyhandoverstop-ack5xostop|-cx disabledglink-edge   lpass< mailbox@17911000<Lqcom,msm8998-apcs-hmss-globalqcom,msm8994-apcs-kpss-globalp 'timer@17920000,tLarm,armv7-timer-mempframe@17921000 3 p frame@17923000 3  p0 disabledframe@17924000 3  p@ disabledframe@17925000 3  pP disabledframe@17926000 3  p` disabledframe@17927000 3  pp disabledframe@17928000 3  p disabledinterrupt-controller@17a00000 Larm,gic-v3p>,t) @ W   wifi@18800000Lqcom,wcn3990-wifi disabledpmembase5cxo_ref_clk_pin  lvbat-regulatorLregulator-fixed VBATN= f=  cam0-vdigLregulator-fixed cam0_vdig   %'defaultcam1-vdigLregulator-fixed cam1_vdig   %'default cam-vio-vregLregulator-fixed cam_vio_vreg   ['default touch-vddio-vregLregulator-fixed touch_vddio_vreg ' %'defaultxvph-pwr-regulatorLregulator-fixed vph_pwr extcon-usbLlinux,extcon-usb-gpio %& %'default^gpio-keys Lgpio-keys  Side buttons'default button-vol-down  Volume Down C r  button-camera-snapshot Camera Snapshot C  button-camera-focus  Camera Focus C  gpio-hall-sensor Lgpio-keys  Hall sensors'defaultevent-hall-sensor0 Cover Hall Sensor C%|   vibratorLgpio-vibrator <['default interrupt-parentqcom,msm-id#address-cells#size-cellsqcom,board-idmodelcompatiblechassis-typedevice_typeregrangesno-mapphandleqcom,client-idqcom,vmidalloc-rangessizerecord-sizeconsole-sizeftrace-sizepmsg-sizeecc-size#clock-cellsclock-frequencyclock-output-namespinctrl-0pinctrl-namesclocksenable-gpiosenable-methodcapacity-dmips-mhzcpu-idle-statesnext-level-cachecache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopinterruptsqcom,rpm-msg-rammboxesqcom,glink-channels#power-domain-cellsoperating-points-v2opp-levelvdd_s1-supplyvdd_s2-supplyvdd_s3-supplyvdd_s4-supplyvdd_s5-supplyvdd_s6-supplyvdd_s7-supplyvdd_s8-supplyvdd_s9-supplyvdd_s10-supplyvdd_s11-supplyvdd_s12-supplyvdd_s13-supplyvdd_l1_l27-supplyvdd_l2_l8_l17-supplyvdd_l3_l11-supplyvdd_l4_l5-supplyvdd_l6-supplyvdd_l7_l12_l14_l15-supplyvdd_l9-supplyvdd_l10_l23_l25-supplyvdd_l13_l19_l21-supplyvdd_l16_l28-supplyvdd_l18_l22-supplyvdd_l20_l24-supplyvdd_l26-supplyvdd_lvs1_lvs2-supplyregulator-min-microvoltregulator-max-microvoltregulator-system-loadregulator-allow-set-loadstatusvdd_bob-supplymemory-regionhwlocksqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresis#reset-cellsclock-namesprotected-clocksbits#qcom,sensorsinterrupt-names#thermal-sensor-cells#iommu-cells#global-interruptsreg-nameslinux,pci-domainbus-rangenum-lanesphysphy-namesinterrupt-map-maskinterrupt-mappower-domainsiommu-mapperst-gpiosresetsreset-namesvdda-phy-supplyvdda-pll-supply#phy-cellslanes-per-directionfreq-table-hz#hwlock-cellsgpio-rangesgpio-controller#gpio-cellsgpio-reserved-rangesgpio-line-namespinsdrive-strengthbias-disablebias-pull-upfunctionbias-pull-downoutput-lowinterrupts-extendedqcom,smem-statesqcom,smem-state-namesqcom,halt-regspower-domain-nameslabeliommusopp-hzopp-supported-hwpx-supplyremote-endpointarm,scatter-gatherqcom,eeqcom,channelregulator-enable-ramp-delayregulator-always-onmode-bootloadermode-recoverydebouncelinux,codeio-channelsio-channel-names#io-channel-cellsinput-enableqcom,drive-strengthpower-sourcedrive-push-pullregulator-min-microampregulator-max-microampregulator-over-current-protectionregulator-pull-downregulator-ramp-delayregulator-settling-time-up-usregulator-settling-time-down-usregulator-soft-startqcom,discharge-resistor-kohmsqcom,soft-start-us#pwm-cellsassigned-clocksassigned-clock-ratessnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,has-lpm-erratumsnps,hird-thresholddr_modeextconnvmem-cellsvdda-phy-dpdm-supplybus-widthcd-gpiosvmmc-supplyvqmmc-supplypinctrl-1#dma-cellsqcom,controlled-remotelynum-channelsqcom,num-eesdmasdma-namesvddio-supplyvddxo-supplyvddrf-supplyvddch0-supplymax-speedvdd-supplyvio-supplysyna,reset-delay-mssyna,startup-delay-mssyna,nosleep-modesyna,sensor-typereset-gpios#mbox-cellsframe-number#redistributor-regionsredistributor-strideqcom,snoc-host-cap-8bit-quirkregulator-nameregulator-boot-onstartup-delay-usenable-active-highgpiovin-supplyid-gpiovbus-gpiolinux,input-typewakeup-sourcedebounce-interval