8( ',Qualcomm Technologies, Inc. SM8550 QRD2qcom,sm8550-qrdqcom,sm8550chosen=serial0:115200n8clocksxo-board 2fixed-clockIVfsleep-clk 2fixed-clockIV}f(bi-tcxo-div2-clkI2fixed-factor-clocknuf'bi-tcxo-ao-div2-clkI2fixed-factor-clocknufpcie-1-phy-aux-clk 2fixed-clockI disabledVcpus cpu@0cpu2arm,cortex-a510npscipscidfl2-cache2cache.:fl3-cache2cache.:fcpu@100cpu2arm,cortex-a510npscipscidfl2-cache2cache.:fcpu@200cpu2arm,cortex-a510npsci  pscidfl2-cache2cache.:f cpu@300cpu2arm,cortex-a715npsci  pscifl2-cache2cache.:f cpu@400cpu2arm,cortex-a715npsci pscifl2-cache2cache.:f cpu@500cpu2arm,cortex-a710npscipscifl2-cache2cache.:fcpu@600cpu2arm,cortex-a710npscipscifl2-cache2cache.:fcpu@700cpu2arm,cortex-x3npscipscifLfl2-cache2cache.:fcpu-mapcluster0core0Hcore1Hcore2Hcore3Hcore4Hcore5Hcore6Hcore7Hidle-statesLpscicpu-sleep-0-02arm,idle-stateYsilver-rail-power-collapsei@ f!cpu-sleep-1-02arm,idle-stateYgold-rail-power-collapsei@Xf"domain-idle-statescluster-sleep-02domain-idle-stateiAD f#cluster-sleep-12domain-idle-stateiAD  6f$firmwarescm2qcom,scm-sm8550qcom,scminterconnect-02qcom,sm8550-clk-virtf0interconnect-12qcom,sm8550-mc-virtfmemory@a0000000memorypmu2arm,armv8-pmuv3 psci 2arm,psci-1.0smcpower-domain-cpu0 !fpower-domain-cpu1 !fpower-domain-cpu2 !f power-domain-cpu3 "f power-domain-cpu4 "fpower-domain-cpu5 "fpower-domain-cpu6 "fpower-domain-cpu7 "fpower-domain-cluster#$f reserved-memory 'hyp-region@80000000.cpusys-vm-region@80a00000@.hyp-tags-region@80e00000=.xbl-sc-region@d8100000.hyp-tags-reserved-region@811d0000.xbl-dt-log-merged-region@81a00000&.aop-cmd-db-region@81c60000 2qcom,cmd-db.aop-config-merged-region@81c80000@.smem@81d00000 2qcom,smem 5%.adsp-mhi-region@81f00000.global-sync-region@82600000`.tz-stat-region@82700000p.cdsp-secure-heap-region@82800000`.mpss-region@8a800000.f{q6-mpss-dtb-region@9b000000.f|ipa-fw-region@9b080000.ipa-gsi-region@9b090000 .gpu-micro-code-region@9b09a000 .spss-region@9b100000.spu-tz-shared-region@9b280000(.spu-modem-shared-region@9b2e0000..camera-region@9b3000000.video-region@9bb00000p.cvp-region@9c200000 p.cdsp-region@9c900000.fq6-cdsp-dtb-region@9e900000.fq6-adsp-dtb-region@9e980000.fadspslpi-region@9ea00000.frmtfs-region@d4a800002qcom,rmtfs-memԨ(.=Lmpss-dsm-region@d4d000000.f}tz-reserved-region@d8000000.cpucp-fw-region@d8140000.qtee-region@d83000000P.ta-region@d8800000؀.tz-tags-region@e1200000 t.hwfence-shbuf-region@e6440000D'.trust-ui-vm-region@f3600000`.trust-ui-vm-dump-region@f80ee000.trust-ui-vm-qrt-region@f80ef000.trust-ui-vm-vblk0-ring-region@f80f8000@.trust-ui-vm-vblk1-ring-region@f80fc000@.trust-ui-vm-swiotlb-region@f8100000.oem-vm-region@f8400000@.oem-vm-vblk0-ring-region@fcc00000@.oem-vm-swiotlb-region@fcc04000@.hyp-ext-tags-region@fce00000.hyp-ext-reserved-region@ff700000p.smp2p-adsp 2qcom,smp2pV`& t&{master-kernelmaster-kernelfslave-kernel slave-kernelfsmp2p-cdsp 2qcom,smp2pV^`& t&{master-kernelmaster-kernelfslave-kernel slave-kernelfsmp2p-modem 2qcom,smp2pV`& t&{master-kernelmaster-kernelfslave-kernel slave-kernelfyipa-ap-to-modemipaipa-modem-to-apipasoc@0 2simple-bus' clock-controller@1000002qcom,sm8550-gccBI4n'()*+++,f.mailbox@4080002qcom,sm8550-ipccqcom,ipcc@ f&dma-controller@800000(2qcom,sm8550-gpi-dmaqcom,sm6350-gpi-dma LMNOPQRSTUVW #> 4-6 disabledf3geniqup@8c00002qcom,geni-se-qup ' ;m-ahbs-ahbn.. 4-#  disabledi2c@8800002qcom,geni-i2c@;sen.oGdefaultU/ u H0012_qup-corequp-configqup-memory r33wtxrx disabledspi@8800002qcom,geni-spi@;sen.o uGdefaultU45H0012_qup-corequp-configqup-memory r33wtxrx  disabledi2c@8840002qcom,geni-i2c@@;sen.qGdefaultU6 G H0012_qup-corequp-configqup-memory r33wtxrx disabledspi@8840002qcom,geni-spi@@;sen.q GGdefaultU78H0012_qup-corequp-configqup-memory r33wtxrx  disabledi2c@8880002qcom,geni-i2c@;sen.sGdefaultU9 H H0012_qup-corequp-configqup-memory r33wtxrx disabledspi@8880002qcom,geni-spi@;sen.s HGdefaultU:;H0012_qup-corequp-configqup-memory r33wtxrx  disabledi2c@88c0002qcom,geni-i2c@;sen.uGdefaultU< I H0012_qup-corequp-configqup-memory r33wtxrx disabledspi@88c0002qcom,geni-spi@;sen.u IGdefaultU=>H0012_qup-corequp-configqup-memory r33wtxrx  disabledi2c@8900002qcom,geni-i2c@;sen.wGdefaultU? J H0012_qup-corequp-configqup-memory r33wtxrx disabledspi@8900002qcom,geni-spi@;sen.w JGdefaultU@AH0012_qup-corequp-configqup-memory r33wtxrx  disabledi2c@8940002qcom,geni-i2c@@;sen.yGdefaultUB K H0012_qup-corequp-configqup-memory r33wtxrx disabledspi@8940002qcom,geni-spi@@;sen.y KGdefaultUCDH0012_qup-corequp-configqup-memory r33wtxrx  disabledi2c@89c0002qcom,geni-i2c@;sen.}GdefaultUE  H0012_qup-corequp-configqup-memory r33wtxrx disabledspi@89c0002qcom,geni-spi@;sen.} GdefaultUFGH0012_qup-corequp-configqup-memory r33wtxrx  disabledgeniqup@9c00002qcom,geni-se-i2c-master-hub ;s-ahbn.Z ' disabledi2c@9800002qcom,geni-i2c-master-hub@;secoren.F.EGdefaultUH  00012_qup-corequp-config disabledi2c@9840002qcom,geni-i2c-master-hub@@;secoren.H.EGdefaultUI  00012_qup-corequp-config disabledi2c@9880002qcom,geni-i2c-master-hub@;secoren.J.EGdefaultUJ  00012_qup-corequp-config disabledi2c@98c0002qcom,geni-i2c-master-hub@;secoren.L.EGdefaultUK  00012_qup-corequp-config disabledi2c@9900002qcom,geni-i2c-master-hub@;secoren.N.EGdefaultUL  00012_qup-corequp-config disabledi2c@9940002qcom,geni-i2c-master-hub@@;secoren.P.EGdefaultUM  00012_qup-corequp-config disabledi2c@9980002qcom,geni-i2c-master-hub@;secoren.R.EGdefaultUN  00012_qup-corequp-config disabledi2c@99c0002qcom,geni-i2c-master-hub@;secoren.T.EGdefaultUO  00012_qup-corequp-config disabledi2c@9a00002qcom,geni-i2c-master-hub@;secoren.V.EGdefaultUP  00012_qup-corequp-config disabledi2c@9a40002qcom,geni-i2c-master-hub@@;secoren.X.EGdefaultUQ  00012_qup-corequp-config disableddma-controller@a00000(2qcom,sm8550-gpi-dmaqcom,sm6350-gpi-dma %&'()* # 4- disabledfTgeniqup@ac00002qcom,geni-se-qup ' ;m-ahbs-ahbn.. 4-00 _qup-core okayi2c@a800002qcom,geni-i2c@;sen.]GdefaultUR a H0012S_qup-corequp-configqup-memory rTTwtxrx disabledspi@a800002qcom,geni-spi@;sen.] aGdefaultUUVH0012S_qup-corequp-configqup-memory rTTwtxrx  disabledi2c@a840002qcom,geni-i2c@@;sen._GdefaultUW b H0012S_qup-corequp-configqup-memory rTTwtxrx disabledspi@a840002qcom,geni-spi@@;sen._ bGdefaultUXYH0012S_qup-corequp-configqup-memory rTTwtxrx  disabledi2c@a880002qcom,geni-i2c@;sen.aGdefaultUZ c H0012S_qup-corequp-configqup-memory rTTwtxrx disabledspi@a880002qcom,geni-spi@;sen.a cGdefaultU[\H0012S_qup-corequp-configqup-memory rTTwtxrx  disabledi2c@a8c0002qcom,geni-i2c@;sen.cGdefaultU] d H0012S_qup-corequp-configqup-memory rTTwtxrx disabledspi@a8c0002qcom,geni-spi@;sen.c dGdefaultU^_H0012S_qup-corequp-configqup-memory rTTwtxrx  disabledi2c@a900002qcom,geni-i2c@;sen.eGdefaultU` e H0012S_qup-corequp-configqup-memory rTTwtxrx disabledspi@a900002qcom,geni-spi@;sen.e eGdefaultUabH0012S_qup-corequp-configqup-memory rTTwtxrx  disabledi2c@a940002qcom,geni-i2c@@;sen.gGdefaultUc fH0012S_qup-corequp-configqup-memory rTTwtxrx  disabledspi@a940002qcom,geni-spi@@;sen.g fGdefaultUdeH0012S_qup-corequp-configqup-memory rTTwtxrx  disabledi2c@a980002qcom,geni-i2c@;sen.iGdefaultUf kH0012S_qup-corequp-configqup-memory rTTwtxrx  disabledspi@a980002qcom,geni-spi@;sen.i kGdefaultUghH0012S_qup-corequp-configqup-memory rTTwtxrx  disabledserial@a9c0002qcom,geni-debug-uart@;sen.kGdefaultUi C_qup-corequp-config00012okayinterconnect@15000002qcom,sm8550-cnoc-mainP0fkinterconnect@16000002qcom,sm8550-config-noc`bf2interconnect@16800002qcom,sm8550-system-nochЀinterconnect@16c00002qcom,sm8550-pcie-anocl"n.. fjinterconnect@16e00002qcom,sm8550-aggre1-nocnDn..fSinterconnect@17000002qcom,sm8550-aggre2-nocpn finterconnect@17800002qcom,sm8550-mmss-nocxfpci@1c00000pci2qcom,pcie-sm8550P0`` ``parfdbielbiatuconfig 8'` `0`0 msi8n.".$.%.*.+..=;auxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr0j1k_pcie-memcpu-pcie --.pci. )pciephyokay l` %l^UmGdefaultphy@1c06000 2qcom,sm8550-qmp-gen3x2-pcie-phy` (n.".$n.&.(;auxcfg_ahbrefrchngpipe.phy1.&A.IVpcie0_pipe_clkiokaytopf)pci@1c08000pci2qcom,pcie-sm8550P0@@ @@parfdbielbiatuconfig 8'@ @0@0 3msi@n.,.../.6.7... I;auxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggrcnoc_sf_axi1.,A$0j1k _pcie-memcpu-pcie --.. pcilink_down. *pciephy disabledphy@1c0e000 2qcom,sm8550-qmp-gen4x2-pcie-phy (n.0..n.2.4;auxcfg_ahbrefrchngpipe. . phyphy_nocsr1.2A.IVpcie1_pipe_clki disabledf*dma-controller@1dc4000 2qcom,bam-v1.7.4qcom,bam-v1.7.0@  4--fqcrypto@1dfa000)2qcom,sm8550-qceqcom,sm8150-qceqcom,qceߠ`rqqwrxtx4--_memoryphy@1d800002qcom,sm8550-qmp-ufs-phy nn. ;refref_aux.rufsphyIiokaytspf+ufs@1d84000+2qcom,sm8550-ufshcqcom,ufshcjedec,ufs-2.0@0   +ufsphy.rst.t 4-`0S12#_ufs-ddrcpu-ufsn;core_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@n....n...@xhxhJuokay lv w"O4xAdfrcrypto@1d88000;2qcom,sm8550-inline-crypto-engineqcom,inline-crypto-engine؀n.fuhwlock@1f400002qcom,tcsr-mutexTf%clock-controller@1fc00002qcom,sm8550-tcsrsysconnIfnclock-controller@3d900002qcom,sm8550-gpuccn'..Iremoteproc@40800002qcom,sm8550-mpss-pas@@L`yyyyy0wdogfatalreadyhandoverstop-ackshutdown-ackn;xozz cxmss b{|}p~ystopokay0qcom/sm8550/modem.mbnqcom/sm8550/modem_dtb.mbnglink-edge`& t&mpsscodec@6aa00002qcom,sm8550-lpass-wsa-macro(nDfg;mclkmacrodcodecfsgen 1DA$I Vwsa2-mclkGdefaultUfsoundwire-controller@6ab00002qcom,soundwire-v2.0.0 n;ifaceWSA2 ??      1 B Y t   disabledcodec@6ac00002qcom,sm8550-lpass-rx-macro(n@fg;mclkmacrodcodecfsgen 1@A$IVmclkGdefaultUfsoundwire-controller@6ad00002qcom,soundwire-v2.0.0 n;ifaceRX ?      1 B Y t  okayfcodec@0,42sdw20217010d00fcodec@6ae00002qcom,sm8550-lpass-tx-macro(n9fg;mclkmacrodcodecfsgen 19A$IVmclkGdefaultUfcodec@6b000002qcom,sm8550-lpass-wsa-macro(nBfg;mclkmacrodcodecfsgen 1BA$IVmclkGdefaultUfsoundwire-controller@6b100002qcom,soundwire-v2.0.0 n;ifaceWSA ??      1 B Y t  okayfspeaker@0,02sdw20217020400GdefaultU  SpkrLeftxfspeaker@0,12sdw20217020400GdefaultU  SpkrRightxfsoundwire-controller@6d300002qcom,soundwire-v2.0.0 corewakeupn;ifaceTX 1BYt okayfcodec@0,32sdw20217010d00fcodec@6d440002qcom,sm8550-lpass-va-macro@$n9fg;mclkmacrodcodec 19A$IVfsgenfpinctrl@6e800002qcom,sm8550-lpass-lpi-pinctrl %+;Gnfg ;coreaudioftx-swr-active-statefclk-pinsSgpio0 Xswr_tx_clkapzdata-pinsSgpio1gpio2gpio14 Xswr_tx_dataaprx-swr-active-statefclk-pinsSgpio3 Xswr_rx_clkapzdata-pins Sgpio4gpio5 Xswr_rx_dataapdmic01-default-stateclk-pinsSgpio6 Xdmic1_clkadata-pinsSgpio7 Xdmic1_dataadmic02-default-stateclk-pinsSgpio8 Xdmic2_clkadata-pinsSgpio9 Xdmic2_dataawsa-swr-active-statefclk-pinsSgpio10 Xwsa_swr_clkapzdata-pinsSgpio11 Xwsa_swr_dataapwsa2-swr-active-statefclk-pinsSgpio15 Xwsa2_swr_clkapzdata-pinsSgpio16Xwsa2_swr_dataapspkr-1-sd-n-active-stateSgpio17Xgpioazfspkr-2-sd-n-active-stateSgpio18Xgpioazfinterconnect@74000002qcom,sm8550-lpass-lpiaon-noc@interconnect@74300002qcom,sm8550-lpass-lpicx-nocCfinterconnect@7e400002qcom,sm8550-lpass-ag-nocmmc@8804000$2qcom,sm8550-sdhciqcom,sdhci-msm-v5@hc_irqpwr_irqn..;ifacecorexo 4-@d,ɀhz012_sdhc-ddrcpu-sdhc disabledopp-table2operating-points-v2fopp-19200000$opp-50000000opp-100000000opp-202000000 Fclock-controller@aaf00002qcom,sm8550-videocc  n'.zIdisplay-subsystem@ae000002qcom,sm8550-mdss mdss S n..=01 _mdp0-memmdp1-mem 4- 'okayfdisplay-controller@ae010002qcom,sm8550-dpu   mdpvbif0n..@=I!;busnrt_busifacelutcorevsyncz1IA$ports port@0endpointfport@1endpointfport@2endpointfopp-table2operating-points-v2fopp-200000000 opp-325000000_@opp-375000000Z opp-514000000tdisplayport-controller@ae900002qcom,sm8550-dpqcom,sm8350-dpP      (n ;;core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel1,, ,dpz disabledports port@0endpointfport@1endpointopp-table2operating-points-v2fopp-162000000 opp-270000000߀opp-540000000 /opp-8100000000Gtdsi@ae94000(2qcom,sm8550-dsi-ctrlqcom,mdss-dsi-ctrl @ dsi_ctrl0nB8.$;bytebyte_intfpixelcoreifacebusz1C dsi okay5pports port@0endpointfport@1endpointAfopp-table2operating-points-v2fopp-187500000 -opp-300000000opp-358000000Vpanel@02visionox,vtdr6130ULGdefaultsleepVal lportendpointfphy@ae950002qcom,sm8550-dsi-phy-4nm0 P R Udsi_phydsi_phy_lanedsi_plln ;ifacerefIiokayyofdsi@ae96000(2qcom,sm8550-dsi-ctrlqcom,mdss-dsi-ctrl ` dsi_ctrl0n D:.$;bytebyte_intfpixelcoreifacebusz1 E dsi  disabledports port@0endpointfport@1endpointphy@ae970002qcom,sm8550-dsi-phy-4nm0 p r udsi_phydsi_phy_lanedsi_plln ;ifacerefIi disabledfclock-controller@af000002qcom,sm8550-dispcc \n'.(,,zIfphy@88e30002qcom,sm8550-snps-eusb2-phy0Tinn;ref.okayaop fphy@88e80002qcom,sm8550-qmp-usb3-dp-phy0 n...;auxrefcom_auxusb3_pipe... phycommonIiokaytpf,usb@a6f88002qcom,sm8550-dwc3qcom,dwc3 o '0n. ....n&;cfg_noccoreifacesleepmock_utmixo1..A$ 4`2hs_phy_irqss_phy_irqdm_hs_phy_irqdp_hs_phy_irq.t.0S12$_usb-ddrapps-usbokayusb@a600000 2snps,dwc3 `  4-@  ,usb2-phyusb3-phyotgports port@0endpointfport@1endpointfinterrupt-controller@b2200002qcom,sm8550-pdcqcom,pdc "@d<^^a}?~ fthermal-sensor@c271000 2qcom,sm8550-tsensqcom,tsens-v2 ' "  uplowcritical fthermal-sensor@c272000 2qcom,sm8550-tsensqcom,tsens-v2 '  "0 uplowcritical fthermal-sensor@c273000 2qcom,sm8550-tsensqcom,tsens-v2 '0 "@ uplowcritical fpower-management@c300000#2qcom,sm8550-aoss-qmpqcom,aoss-qmp 0&`& t&If~sram@c3f00002qcom,rpmh-stats ?spmi@c4000002qcom,spmi-pmic-arbP @0 P D L B@corechnlsobsrvrintrcnfg periph_irq ` & 3 pmic@c2qcom,pm8010qcom,spmi-pmic  temp-alarm@24002qcom,spmi-temp-alarm$ $ fpmic@d2qcom,pm8010qcom,spmi-pmic  temp-alarm@24002qcom,spmi-temp-alarm$ $ fpmic@12qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800 2qcom,pm8550-gpioqcom,spmi-gpio+G ;fvolume-up-n-stateSgpio6Xnormal ? Lfled-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-ledokayled-0Xflash Y _ k  |  led-1Xflash Y _ k  |  pwm!2qcom,pm8550-pwmqcom,pm8350c-pwm  okaymulti-led Y Xstatus led@1 Yled@2 Yled@3 Ypmic@72qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800!2qcom,pm8550b-gpioqcom,spmi-gpio+G ;fphy@fd002qcom,pm8550b-eusb2-repeateri  fpmic@52qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio+G;fpmic@22qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio+G;fpmic@32qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio+G;fpmic@42qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio+G;fpmic@62qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio+G;fpmic@02qcom,pm8550qcom,spmi-pmic pon@13002qcom,pmk8350-pon hlospbspwrkey2qcom,pmk8350-pwrkey tokayresin2qcom,pmk8350-resinokay rrtc@61002qcom,pmk8350-rtcab rtcalarmbnvram@71002qcom,spmi-sdamq  'qreboot-reason@48H fgpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpio+G;fpmic@a2qcom,pmr735dqcom,spmi-pmic  temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800!2qcom,pmr735d-gpioqcom,spmi-gpio+G;fpmic@b2qcom,pmr735dqcom,spmi-pmic  temp-alarm@a002qcom,spmi-temp-alarm   fgpio@8800!2qcom,pmr735d-gpioqcom,spmi-gpio+G;fpinctrl@f1000002qcom,sm8550-tlmm0 +;Gl  flhub-i2c0-data-clk-stateSgpio16gpio17 Xi2chub0_se0a LfHhub-i2c1-data-clk-stateSgpio18gpio19 Xi2chub0_se1a LfIhub-i2c2-data-clk-stateSgpio20gpio21 Xi2chub0_se2a LfJhub-i2c3-data-clk-stateSgpio22gpio23 Xi2chub0_se3a LfKhub-i2c4-data-clk-state Sgpio4gpio5 Xi2chub0_se4a LfLhub-i2c5-data-clk-state Sgpio6gpio7 Xi2chub0_se5a LfMhub-i2c6-data-clk-state Sgpio8gpio9 Xi2chub0_se6a LfNhub-i2c7-data-clk-stateSgpio10gpio11 Xi2chub0_se7a LfOhub-i2c8-data-clk-stateSgpio206gpio207 Xi2chub0_se8a LfPhub-i2c9-data-clk-stateSgpio84gpio85 Xi2chub0_se9a LfQpcie0-default-statefmperst-pinsSgpio94Xgpioa clkreq-pinsSgpio95Xpcie0_clk_req_na Lwake-pinsSgpio96Xgpioa Lpcie1-default-stateperst-pinsSgpio97Xgpioa clkreq-pinsSgpio98Xpcie1_clk_req_na Lwake-pinsSgpio99Xgpioa Lqup-i2c0-data-clk-stateSgpio28gpio29 Xqup1_se0a LfRqup-i2c1-data-clk-stateSgpio32gpio33 Xqup1_se1a LfWqup-i2c2-data-clk-stateSgpio36gpio37 Xqup1_se2a LfZqup-i2c3-data-clk-stateSgpio40gpio41 Xqup1_se3a Lf]qup-i2c4-data-clk-stateSgpio44gpio45 Xqup1_se4a Lf`qup-i2c5-data-clk-stateSgpio52gpio53 Xqup1_se5a Lfcqup-i2c6-data-clk-stateSgpio48gpio49 Xqup1_se6a Lffqup-i2c8-data-clk-statef/scl-pinsSgpio57Xqup2_se0_l1_miraa Lsda-pinsSgpio56Xqup2_se0_l0_miraa Lqup-i2c9-data-clk-stateSgpio60gpio61 Xqup2_se1a Lf6qup-i2c10-data-clk-stateSgpio64gpio65 Xqup2_se2a Lf9qup-i2c11-data-clk-stateSgpio68gpio69 Xqup2_se3a Lf<qup-i2c12-data-clk-state Sgpio2gpio3 Xqup2_se4a Lf?qup-i2c13-data-clk-stateSgpio80gpio81 Xqup2_se5a LfBqup-i2c15-data-clk-stateSgpio72gpio106 Xqup2_se7a LfEqup-spi0-cs-stateSgpio31 Xqup1_se0azfVqup-spi0-data-clk-stateSgpio28gpio29gpio30 Xqup1_se0azfUqup-spi1-cs-stateSgpio35 Xqup1_se1azfYqup-spi1-data-clk-stateSgpio32gpio33gpio34 Xqup1_se1azfXqup-spi2-cs-stateSgpio39 Xqup1_se2azf\qup-spi2-data-clk-stateSgpio36gpio37gpio38 Xqup1_se2azf[qup-spi3-cs-stateSgpio43 Xqup1_se3azf_qup-spi3-data-clk-stateSgpio40gpio41gpio42 Xqup1_se3azf^qup-spi4-cs-stateSgpio47 Xqup1_se4azfbqup-spi4-data-clk-stateSgpio44gpio45gpio46 Xqup1_se4azfaqup-spi5-cs-stateSgpio55 Xqup1_se5azfequp-spi5-data-clk-stateSgpio52gpio53gpio54 Xqup1_se5azfdqup-spi6-cs-stateSgpio51 Xqup1_se6azfhqup-spi6-data-clk-stateSgpio48gpio49gpio50 Xqup1_se6azfgqup-spi8-cs-stateSgpio59Xqup2_se0_l3_miraazf5qup-spi8-data-clk-stateSgpio56gpio57gpio58Xqup2_se0_l2_miraazf4qup-spi9-cs-stateSgpio63 Xqup2_se1azf8qup-spi9-data-clk-stateSgpio60gpio61gpio62 Xqup2_se1azf7qup-spi10-cs-stateSgpio67 Xqup2_se2azf;qup-spi10-data-clk-stateSgpio64gpio65gpio66 Xqup2_se2azf:qup-spi11-cs-stateSgpio71 Xqup2_se3azf>qup-spi11-data-clk-stateSgpio68gpio69gpio70 Xqup2_se3azf=qup-spi12-cs-stateSgpio119 Xqup2_se4azfAqup-spi12-data-clk-stateSgpio2gpio3gpio118 Xqup2_se4azf@qup-spi13-cs-stateSgpio83 Xqup2_se5azfDqup-spi13-data-clk-stateSgpio80gpio81gpio82 Xqup2_se5azfCqup-spi15-cs-stateSgpio75 Xqup2_se7azfGqup-spi15-data-clk-stateSgpio72gpio106gpio74 Xqup2_se7azfFqup-uart7-default-stateSgpio26gpio27 Xqup1_se7azfisdc2-sleep-stateclk-pins Ssdc2_clkzacmd-pins Ssdc2_cmd Ladata-pins Ssdc2_data Lasdc2-default-stateclk-pins Ssdc2_clkzacmd-pins Ssdc2_cmd La data-pins Ssdc2_data La sde-dsi-active-stateSgpio133Xgpioazfsde-dsi-suspend-stateSgpio133Xgpioa fsde-te-active-stateSgpio86 Xmdp_vsynca fsde-te-suspend-stateSgpio86 Xmdp_vsynca fwcd-reset-n-active-stateSgpio108Xgpioazfiommu@15000000/2qcom,sm8550-smmu-500qcom,smmu-500arm,mmu-500  +Aabcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYf-interrupt-controller@17100000 2arm,gic-v3  ' > U   fmsi-controller@171400002arm,gic-v3-its j ytimer@174200002arm,armv7-timer-memB'  frame@17421000BB  frame@17423000B0    disabledframe@17425000BP    disabledframe@17427000Bp    disabledframe@17429000B    disabledframe@1742b000B    disabledframe@1742d000B   disabledrsc@17a00000 apps_rsc2qcom,rpmh-rsc@drv-0drv-1drv-2drv-3$    bcm-voter2qcom,bcm-voterfclock-controller2qcom,sm8550-rpmh-clkI;xonfpower-controller2qcom,sm8550-rpmhpdfzopp-table2operating-points-v2fopp-16 opp-48 0fopp-52 4opp-56 8fopp-60 <opp-64 @fopp-80 Popp-128 fopp-144 opp-192 fopp-256 ftopp-320 @opp-336 Popp-384 opp-416 regulators-02qcom,pm8550-rpmh-regulators b      - ? P a p  bob1 vreg_bob1 2K aliases$ N/soc@0/geniqup@ac0000/serial@a9c000audio-codec2qcom,wcd9385-codecGdefaultU Vw@ nw@ w@ w@ $I      P-< llK[kfgpio-keys 2gpio-keysUGdefaultkey-volume-up Volume Up s pmic-glink'2qcom,sm8550-pmic-glinkqcom,pmic-glink connector@02usb-c-connectordualdualports port@0endpointfport@1endpointfsound(2qcom,sm8550-sndcardqcom,sm8450-sndcard ,SM8550-QRDSpkrLeft INWSA_SPK1 OUTSpkrRight INWSA_SPK2 OUTIN1_HPHLHPHL_OUTIN2_HPHRHPHR_OUTAMIC2MIC BIAS2VA DMIC0MIC BIAS1VA DMIC1MIC BIAS1VA DMIC2MIC BIAS3TX DMIC0MIC BIAS1TX DMIC1MIC BIAS2TX DMIC2MIC BIAS3TX SWR_ADC1ADC2_OUTPUTwcd-playback-dai-link WCD Playbackcpuqcodecplatformwcd-capture-dai-link WCD Capturecpuxcodecplatformwsa-dai-link WSA Playbackcpuicodecplatformva-dai-link VA Capturecpuxcodecplatformvph-pwr-regulator2regulator-fixed vph_pwr 8u  8u f interrupt-parent#address-cells#size-cellsmodelcompatiblestdout-path#clock-cellsclock-frequencyphandleclocksclock-multclock-divstatusdevice_typeregenable-methodnext-level-cachepower-domainspower-domain-namesqcom,freq-domaincapacity-dmips-mhzdynamic-power-coefficient#cooling-cellscache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopinterconnects#interconnect-cellsqcom,bcm-votersinterrupts#power-domain-cellsdomain-idle-statesrangesno-maphwlocksqcom,client-idqcom,vmidqcom,smeminterrupts-extendedmboxesqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#reset-cells#mbox-cells#dma-cellsdma-channelsdma-channel-maskiommusclock-namespinctrl-namespinctrl-0interconnect-namesdmasdma-namesreg-namesbus-rangedma-coherentlinux,pci-domainnum-lanesinterrupt-namesinterrupt-map-maskinterrupt-mapiommu-mapresetsreset-namesphysphy-nameswake-gpiosperst-gpiosassigned-clocksassigned-clock-ratesclock-output-names#phy-cellsvdda-phy-supplyvdda-pll-supplyqcom,eeqcom,controlled-remotelylanes-per-directionrequired-oppsfreq-table-hzqcom,icereset-gpiosvcc-supplyvcc-max-microampvccq-supplyvccq-max-microampvccq2-supplyvccq2-max-microamp#hwlock-cellsmemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-namesfirmware-namelabel#sound-dai-cellsqcom,din-portsqcom,dout-portsqcom,ports-sintervalqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-block-group-countqcom,ports-lane-controlqcom,rx-port-mappingpowerdown-gpiossound-name-prefixvdd-1p8-supplyvdd-io-supplyqcom,ports-sinterval-lowqcom,tx-port-mappinggpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoutput-lowqcom,dll-configqcom,ddr-configoperating-points-v2bus-widthsdhci-caps-maskopp-hzremote-endpointassigned-clock-parentsvdda-supplydata-lanespinctrl-1vci-supplyvdd-supplyvddio-supplyvdds-supplyvdda12-supplysnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,usb3_lpm_capabledr_modeusb-role-switchqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,channelqcom,bus-idpower-sourcebias-pull-upcolorled-sourcesled-max-microampflash-max-microampflash-max-timeout-usfunction-enumerator#pwm-cellsvdd18-supplyvdd3-supplylinux,codebitswakeup-parentgpio-reserved-rangesbias-pull-down#iommu-cells#global-interrupts#redistributor-regionsredistributor-stridemsi-controller#msi-cellsframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configopp-levelqcom,pmic-idvdd-bob1-supplyvdd-bob2-supplyvdd-l1-l4-l10-supplyvdd-l2-l13-l14-supplyvdd-l3-supplyvdd-l5-l16-supplyvdd-l6-l7-supplyvdd-l8-l9-supplyvdd-l11-supplyvdd-l12-supplyvdd-l15-supplyvdd-l17-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-modevdd-l1-supplyvdd-l2-supplyvdd-s4-supplyvdd-s5-supplyvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s6-supply#freq-domain-cellsopp-peak-kBpsqcom,glink-channelsqcom,domainqcom,intentsqcom,protection-domainpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisnvmem-cellsnvmem-cell-namesmode-recoverymode-bootloaderserial0qcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,mbhc-buttons-vthreshold-microvoltqcom,mbhc-headset-vthreshold-microvoltqcom,mbhc-headphone-vthreshold-microvoltqcom,rx-deviceqcom,tx-devicevdd-buck-supplyvdd-rxtx-supplyvdd-mic-bias-supplydebounce-intervallinux,can-disablewakeup-sourcepower-roledata-roleaudio-routinglink-namesound-dairegulator-always-onregulator-boot-on