`8۬( t%pine64,pinephone-prorockchip,rk3399 +7Pine64 PinePhonePro=handsetaliasesJ/ethernet@fe300000T/i2c@ff3c0000Y/i2c@ff110000^/i2c@ff120000c/i2c@ff130000h/i2c@ff3d0000m/i2c@ff140000r/i2c@ff150000w/i2c@ff160000|/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/mmc@fe310000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid - A Lcpu@1cpuarm,cortex-a53pscid - A Lcpu@2cpuarm,cortex-a53pscid - A Lcpu@3cpuarm,cortex-a53pscid - A Lcpu@100cpuarm,cortex-a72psci  - ALthermal-idleT'`cpu@101cpuarm,cortex-a72psci  - ALthermal-idleT'`idle-statesppscicpu-sleeparm,idle-state}x`L cluster-sleeparm,idle-state}`L display-subsystemrockchip,display-subsystemmemory-controllerrockchip,rk3399-dmcdmc_clk disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6.xin24mALpcie@f8000000rockchip,rk3399-pcie Naxi-baseapb-basepci+Xiu Gaclkaclk-perfhclkpm0123syslegacyclient` ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38ւ8(coremgmtmgmt-stickypipepmpclkaclk disabledinterrupt-controllerXLethernet@fe300000rockchip,rk3399-gmac0 macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac stmmaceth  disabledmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@+р Mbiuciuciu-driveciu-sample9yresetokayDN_lwdefault mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@A+р  Lbiuciuciu-driveciu-sample9zresetokayDN ldefault !"#$mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 N Nclk_xinclk_ahb.emmc_cardclockA% phy_arasan)okayD:Lusb@fe380000 generic-ehci8&'usb disabledusb@fe3a0000 generic-ohci:&'usb disabledusb@fe3c0000 generic-ehci<()usb disabledusb@fe3e0000 generic-ohci> ()usb disableddebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otg disabledusb@fe800000 snps,dwc3irefbus_earlysuspendIotg*+usb2-phyusb3-phy Qutmi_wideZr disabledusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otg disabledusb@fe900000 snps,dwc3nrefbus_earlysuspendIotg,-usb2-phyusb3-phy Qutmi_wideZr disableddp@fec00000rockchip,rk3399-cdn-dp r  ruocore-clkpclkspdifgrf./ HJspdifdptxapbcore disabledportsport+endpoint@00Lendpoint@11Linterrupt-controller@fee00000 arm,gic-v3X+P  Lmsi-controller@fee20000arm,gic-v3-itsLppi-partitionsinterrupt-partition-0*Linterrupt-partition-1*Lsaradc@ff100000rockchip,rk3399-saradc>3Pesaradcapb_pclk saradc-apbokayE2Lcrypto@ff8b0000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2cA AU i2cpclk;default3+ disabledi2c@ff120000rockchip,rk3399-i2cB BV i2cpclk#default4+ disabledi2c@ff130000rockchip,rk3399-i2cC CW i2cpclk"default5+okayQhtouchscreen@14goodix,gt1158 6  6  6 77i2c@ff140000rockchip,rk3399-i2cD DX i2cpclk&default8+ disabledi2c@ff150000rockchip,rk3399-i2cE EY i2cpclk%default9+ disabledi2c@ff160000rockchip,rk3399-i2cF FZ i2cpclk$default:+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkcdefault ;<=okaybluetoothbrcm,bcm4345c5>lpo ? $`default @AB . =#ICserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkbdefaultD disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkddefaultEokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclkedefaultF disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDVG G [txrxdefaultHIJK+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5VG G [txrxdefaultLMNO+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4VGG[txrxdefaultPQRS+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCVGG[txrxdefaultTUVW+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclkVXX [txrxdefaultYZ[\+ disabledthermal-zonescpu-thermaled{]tripscpu_alert0EpassiveL^cpu_alert1 EpassiveL_cpu_crits Ecriticalcooling-mapsmap0^map1_Hgpu-thermaled{]tripsgpu_alert0$EpassiveL`gpu_crits Ecriticalcooling-mapsmap0` atsadc@ff260000rockchip,rk3399-tsadc&aO qOdtsadcapb_pclk tsadc-apbsinitdefaultsleepbcbokayL]qos@ffa58000rockchip,rk3399-qossyscon Lkqos@ffa5c000rockchip,rk3399-qossyscon Llqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon Loqos@ffa70080rockchip,rk3399-qossyscon Lpqos@ffa74000rockchip,rk3399-qossyscon@ Lmqos@ffa76000rockchip,rk3399-qossyscon` Lnqos@ffa90000rockchip,rk3399-qossyscon Lqqos@ffa98000rockchip,rk3399-qossyscon Ldqos@ffaa0000rockchip,rk3399-qossyscon Lrqos@ffaa0080rockchip,rk3399-qossyscon Lsqos@ffaa8000rockchip,rk3399-qossyscon Ltqos@ffaa8080rockchip,rk3399-qossyscon Luqos@ffab0000rockchip,rk3399-qossyscon Leqos@ffab0080rockchip,rk3399-qossyscon Lfqos@ffab8000rockchip,rk3399-qossyscon Lgqos@ffac0000rockchip,rk3399-qossyscon Lhqos@ffac0080rockchip,rk3399-qossyscon Liqos@ffac8000rockchip,rk3399-qossyscon Lvqos@ffac8080rockchip,rk3399-qossyscon Lwqos@ffad0000rockchip,rk3399-qossyscon Lxqos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon Ljpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller7+Lpower-domain@34"Kd7power-domain@33!Kef7power-domain@31Kg7power-domain@32 Khi7power-domain@35#Kj7power-domain@25l7power-domain@23Kk7power-domain@22fKl7power-domain@27LKm7power-domain@28Kn7power-domain@8~}7power-domain@9 7power-domain@24Kop7power-domain@157+power-domain@21rKq7power-domain@19Krs7power-domain@20Ktu7power-domain@167+power-domain@17Kvw7power-domain@18Kx7syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2Lio-domains&rockchip,rk3399-pmu-io-voltage-domainokayRCspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5yyspiclkapb_pclk<defaultz{|}+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7yy"baudclkapb_pclkfdefault~ disabledi2c@ff3c0000rockchip,rk3399-i2c<y  y y i2cpclk9default+okayQhpmic@1crockchip,rk818 A.xin32krk808-clkout2defaulta##L>regulatorsDCDC_REG1 vdd_cpu_l% Y=UqL regulator-state-memjDCDC_REG2 vdd_center% 5=B@Uqregulator-state-memjDCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vcc_1v8%w@=w@LCregulator-state-memLDO_REG1vcca3v0_codec%-=-LDO_REG2 vcc3v0_touch%-=-L7LDO_REG3vcca1v8_codec%w@=w@LLDO_REG4 rk818_pwr_on%2Z=2Zregulator-state-memLDO_REG5vcc_3v0%-=-Lregulator-state-memLDO_REG6vcc_1v5%`=`regulator-state-memLDO_REG7 vcc1v8_dvp%w@=w@LLDO_REG8 vcc3v3_s3%2Z=2Zregulator-state-memjLDO_REG9 vccio_sd%w@=2ZL$SWITCH_REG vcc3v3_s0regulator-state-memregulator@40silergy,syr827@default vdd_cpu_b% Y=0ULregulator-state-memjregulator@41silergy,syr828Adefaultvdd_gpu% Y=ULregulator-state-memji2c@ff3d0000rockchip,rk3399-i2c=y  y y i2cpclk8default+ disabledi2c@ff3e0000rockchip,rk3399-i2c>y  y y i2cpclk:default+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaultyokayLpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaulty disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB defaulty disabledpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0defaulty disableddfi@ff630000c@rockchip,rk3399-dfiy pclk_ddr_mon disabledLvideo-codec@ff650000rockchip,rk3399-vpue rq vepuvdpu aclkhclkiommu@ff650800rockchip,iommue@s aclkifaceLvideo-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccore iommu@ff660480rockchip,iommu f@f@u aclkiface Liommu@ff670800rockchip,iommug@* aclkiface disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@  apb_pclkLXdma-controller@ff6e0000arm,pl330arm,primecelln@  apb_pclkLGclock-controller@ff750000rockchip,rk3399-pmucruuxin24mAy(JLyclock-controller@ff760000rockchip,rk3399-cruvxin24mA@BCxD#g/;рxh<4`#Fׄׄ ׄLsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+Lio-domains"rockchip,rk3399-io-voltage-domainokay   $ -mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrf = disabledLusb2phy@e450rockchip,rk3399-usb2phyP{phyclkA.clk_usbphy0_480m disabledL&host-port = linestate disabledL'otg-port =0ghjotg-bvalidotg-idlinestate disabledL*usb2phy@e460rockchip,rk3399-usb2phy`|phyclkA.clk_usbphy1_480m disabledL(host-port = linestate disabledL)otg-port =0lmootg-bvalidotg-idlinestate disabledL,phy@f780rockchip,rk3399-emmc-phy$emmcclk H2 =okayL%pcie-phyrockchip,rk3399-pcie-phyrefclk =phy disabledLphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~Luphyuphy-pipeuphy-tcphy disableddp-port =L.usb3-port =L+phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-ref Muphyuphy-pipeuphy-tcphy disableddp-port =L/usb3-port =L-watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifBVX[tx mclkhclkUdefault disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s'VXX[txrxi2s_clki2s_hclkVbclk_onbclk_off disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(VXX[txrxi2s_clki2s_hclkWdefault disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)VXX[txrxi2s_clki2s_hclkX disabledLvop@ff8f0000rockchip,rk3399-vop-lit w ׄaclk_vopdclk_vophclk_vop axiahbdclkokay \port+Lendpoint@0Lendpoint@1Lendpoint@2Lendpoint@3Lendpoint@4L1iommu@ff8f3f00rockchip,iommu?w aclkifaceokayLvop@ff900000rockchip,rk3399-vop-big v ׄaclk_vopdclk_vophclk_vop axiahbdclkokay \port+Lendpoint@0Lendpoint@1Lendpoint@2Lendpoint@3Lendpoint@4L0iommu@ff903f00rockchip,iommu?v aclkifaceokayLisp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclkdphy disabledports+port@0+iommu@ff914000rockchip,iommu @P+ aclkiface sLisp1@ff920000rockchip,rk3399-cif-isp@,oispaclkhclkdphy disabledports+port@0+iommu@ff924000rockchip,iommu @P, aclkiface sLhdmi-soundsimple-audio-card i2s  hdmi-sound disabledsimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmi(tqpoiahbisfrcecgrfref disabledLportsport+endpoint@0Lendpoint@1Ldsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrfapb+okay ports+port@0+endpoint@0Lendpoint@1Lport@1+endpointLpanel@0hannstar,hsd060bhw4    defaultportendpointLdsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrfapb+ = disabledLports+port@0+endpoint@0Lendpoint@1Lport@1dp@ff970000rockchip,rk3399-edp jlo dppclkgrfdefaultdp disabledports+port@0+endpoint@0Lendpoint@1Lport@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 jobmmugpu#okay- Lapinctrlrockchip,rk3399-pinctrl+gpio@ff720000rockchip,gpio-bankry  -XLgpio@ff730000rockchip,gpio-banksy  -XLgpio@ff780000rockchip,gpio-bankxP  -XL?gpio@ff788000rockchip,gpio-bankxQ  -XL6gpio@ff790000rockchip,gpio-bankyR  -XLpcfg-pull-up 9Lpcfg-pull-down FLpcfg-pull-none ULpcfg-pull-none-12ma U b Lpcfg-pull-none-13ma U b Lpcfg-pull-none-18ma U bpcfg-pull-none-20ma U bpcfg-pull-up-2ma 9 bpcfg-pull-up-8ma 9 bpcfg-pull-up-18ma 9 bpcfg-pull-up-20ma 9 bpcfg-pull-down-4ma F bpcfg-pull-down-8ma F bpcfg-pull-down-12ma F b pcfg-pull-down-18ma F bpcfg-pull-down-20ma F bpcfg-output-high qpcfg-output-low }pcfg-input-enable pcfg-input-pull-up  9pcfg-input-pull-down  Fclockclk-32k cifcif-clkin  cif-clkouta  edpedp-hpd Lgmacrgmii-pins     rmii-pins      i2c0i2c0-xfer Li2c1i2c1-xfer L3i2c2i2c2-xfer L4i2c3i2c3-xfer L5i2c4i2c4-xfer   Li2c5i2c5-xfer   L8i2c6i2c6-xfer   L9i2c7i2c7-xfer L:i2c8i2c8-xfer Li2s0i2s0-2ch-bus` i2s0-2ch-bus-bclk-off` i2s0-8ch-bus Li2s0-8ch-bus-bclk-off Li2s1i2s1-2ch-busP Li2s1-2ch-bus-bclk-offP sdio0sdio0-bus1 sdio0-bus4@ Lsdio0-cmd Lsdio0-clk Lsdio0-cd sdio0-pwr sdio0-bkpwr sdio0-wp sdio0-int sdmmcsdmmc-bus1 sdmmc-bus4@    L"sdmmc-clk  Lsdmmc-cmd  L sdmmc-cd L!sdmmc-wp suspendap-pwroff ddrio-pwroff spdifspdif-bus Lspdif-bus-1 spi0spi0-clk LHspi0-cs0 LKspi0-cs1 spi0-tx LIspi0-rx LJspi1spi1-clk  LLspi1-cs0  LOspi1-rx LNspi1-tx LMspi2spi2-clk  LPspi2-cs0  LSspi2-rx  LRspi2-tx  LQspi3spi3-clk Lzspi3-cs0 L}spi3-rx L|spi3-tx L{spi4spi4-clk LTspi4-cs0 LWspi4-rx LVspi4-tx LUspi5spi5-clk LYspi5-cs0 L\spi5-rx L[spi5-tx LZtestclktest-clkout0 test-clkout1 test-clkout2 tsadcotp-pin Lbotp-out Lcuart0uart0-xfer L;uart0-cts L<uart0-rts L=uart1uart1-xfer   LDuart2auart2a-xfer  uart2buart2b-xfer uart2cuart2c-xfer LEuart3uart3-xfer LFuart3-cts uart3-rts uart4uart4-xfer L~uarthdcpuarthdcp-xfer pwm0pwm0-pin Lpwm0-pin-pull-down vop0-pwm-pin vop1-pwm-pin pwm1pwm1-pin Lpwm1-pin-pull-down pwm2pwm2-pin Lpwm2-pin-pull-down pwm3apwm3a-pin Lpwm3bpwm3b-pin hdmihdmi-i2c-xfer hdmi-cec pciepci-clkreqn-cpm pci-clkreqnb-cpm buttonspwrbtn-pin Lpmicpmic-int-l Lvsel1-pin Lvsel2-pin Lsdio-pwrseqwifi-enable-h-pin Lsoundvcc1v8-codec-en Lwireless-bluetoothbt-wake-pin LAbt-host-wake-pin L@bt-reset-pin LBopp-table-0operating-points-v2 L opp00 Q  @opp01 #F opp02 0, P Popp03 < HHopp04 G B@B@ disabledopp05 Tfr ** disabledopp-table-1operating-points-v2 L opp00 Q  @opp01 #F opp02 0, opp03 < Y Yopp04 G ~~opp05 Tfr opp06 Yh/ 0opp07 kI OO disabledopp-table-2operating-points-v2Lopp00  0opp01 @ 0opp02 ׄ 0opp03 e Y Y0opp04 #F HH0opp05 / 0chosen serial2:115200n8adc-keys adc-keys  buttons j dbutton-up %Volume Up +s 6button-down %Volume Down +r 6 'backlightpwm-backlight PPLgpio-keys gpio-keysdefaultkey-power U  %Power +tvcc-sys-regulatorregulator-fixedvcc_sysLvcc3v3-sys-regulatorregulator-fixed vcc3v3_sys%2Z=2Z gL#vcc1v8-s3-regulatorregulator-fixed vcca1v8_s3%w@=w@ g#L2vcc1v8-codec-regulatorregulator-fixed r 6default vcc1v8_codec%w@=w@ g#sdio-wifi-pwrseqmmc-pwrseq-simple> ext_clockdefault n '  Lvcc1v8-lcdregulator-fixed r vcc1v8_lcd%w@=w@ g# 6defaultLvcc2v8-lcdregulator-fixed r vcc2v8_lcd%*=* g# 6defaultL compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typeethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllerpower-domainsrockchip,grfsnps,txpblmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqdisable-wpkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0sd-uhs-sdr104assigned-clocksassigned-clock-ratescd-gpiosvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsirq-gpiosreset-gpiosAVDD28-supplyVDDIO-supplytouchscreen-size-xtouchscreen-size-yreg-shiftreg-io-widthuart-has-rtsctsdevice-wakeup-gpioshost-wakeup-gpiosmax-speedshutdown-gpiosvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendfcs,suspend-voltage-selector#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmassigned-clock-parentsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiclock-masterbacklightvcc-supplyiovcc-supplymali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltpwmsdebounce-intervalvin-supplyenable-active-highgpiopost-power-on-delay-mspower-off-delay-us