e#8`D(` fsl,ls2088a-qdsfsl,ls2088a +%7Freescale Layerscape 2088A QDS Boardaliases=/soc/crypto@8000000D/soc/timer@2800000I/soc/serial@21c0500Q/soc/serial@21c0600Y/soc/serial@21d0500a/soc/serial@21d0600cpus+cpu@0icpuarm,cortex-a72u y cpu@1icpuarm,cortex-a72u y cpu@100icpuarm,cortex-a72u ycpu@101icpuarm,cortex-a72u ycpu@200icpuarm,cortex-a72u ycpu@201icpuarm,cortex-a72u ycpu@300icpuarm,cortex-a72u ycpu@301icpuarm,cortex-a72u yl2-cache0cachel2-cache1cachel2-cache2cachel2-cache3cachecpu-pw20arm,idle-statePW20 pmemory@80000000imemoryusysclk fixed-clock+8Hsysclkinterrupt-controller@6000000 arm,gic-v3Pu  [+ls  msi-controller@6020000arm,gic-v3-itsusyscon@1e60000fsl,ls2080a-rstcrsysconurebootsyscon-rebootthermal-zonesddr-controller1 tripsddr-ctrler1-crits pcriticalddr-controller2 tripsddr-ctrler2-crits pcriticalddr-controller3 tripsddr-ctrler3-crits pcriticalcore-cluster1 tripscore-cluster1-alertLppassive core-cluster1-crits pcriticalcooling-mapsmap0  core-cluster2 tripscore-cluster2-alertLppassive core-cluster2-crits pcriticalcooling-mapsmap0 core-cluster3 tripscore-cluster3-alertLppassivecore-cluster3-crits pcriticalcooling-mapsmap0core-cluster4 tripscore-cluster4-alertLppassivecore-cluster4-crits pcriticalcooling-mapsmap0timerarm,armv8-timer0   pmuarm,armv8-pmuv3 psci arm,psci-0.2smcsoc simple-bus+lclocking@1300000fsl,ls2080a-clockgenu0 +ydcfg@1e00000fsl,ls2080a-dcfgsysconu&efuse@1e80000fsl,ls1028a-sfpu y4sfpsyscon@1f70000fsl,ls2080a-iscsysconu&+linterrupt-controller@14&fsl,ls2080a-extirqfsl,ls1088a-extirq[su @      Ntmu@1f80000fsl,qoriq-tmuu a *Lbo&-29?FMTZ a j q%,5=ENWak v)3=IVam!*<N& serial@21c0500fsl,ns16550ns16550au y  serial@21c0600fsl,ns16550ns16550au y  serial@21d0500fsl,ns16550ns16550au y !serial@21d0600fsl,ns16550ns16550au y !wdt@c000000arm,sp805arm,primecellu y4wdog_clkapb_pclkwdt@c010000arm,sp805arm,primecellu y4wdog_clkapb_pclkwdt@c100000arm,sp805arm,primecellu y4wdog_clkapb_pclkwdt@c110000arm,sp805arm,primecellu y4wdog_clkapb_pclkwdt@c200000arm,sp805arm,primecellu y4wdog_clkapb_pclkwdt@c210000arm,sp805arm,primecellu !y4wdog_clkapb_pclkwdt@c300000arm,sp805arm,primecellu 0y4wdog_clkapb_pclkwdt@c310000arm,sp805arm,primecellu 1y4wdog_clkapb_pclkcrypto@8000000fsl,sec-v5.0fsl,sec-v4.0+lu jr@10000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu jr@20000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu jr@30000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu jr@40000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu console@8340020fsl,dpaa2-consoleu4 ptp-timer@8b95000fsl,dpaa2-ptpuP y&mdio@8b96000fsl,fman-memac-mdiou`&+8&% y disabled-mdio@8b97000fsl,fman-memac-mdioup&+8&% y disabledmdio@8c07000fsl,fman-memac-mdioup&+ disabledethernet-phy@0umdio@8c0b000fsl,fman-memac-mdiou&+ disabledethernet-phy@0umdio@8c0f000fsl,fman-memac-mdiou&+ disabledethernet-phy@0umdio@8c13000fsl,fman-memac-mdiou0&+ disabledethernet-phy@0umdio@8c17000fsl,fman-memac-mdioup&+ disabledethernet-phy@0umdio@8c1b000fsl,fman-memac-mdiou&+ disabledethernet-phy@0umdio@8c1f000fsl,fman-memac-mdiou&+ disabledethernet-phy@0umdio@8c23000fsl,fman-memac-mdiou0&+ disabledethernet-phy@0u mdio@8c27000fsl,fman-memac-mdioup&+ disabledethernet-phy@0u!mdio@8c2b000fsl,fman-memac-mdiou°&+ disabledethernet-phy@0u#mdio@8c2f000fsl,fman-memac-mdiou&+ disabledethernet-phy@0u%mdio@8c33000fsl,fman-memac-mdiou0&+ disabledethernet-phy@0u'mdio@8c37000fsl,fman-memac-mdioup&+ disabledethernet-phy@0u)mdio@8c3b000fsl,fman-memac-mdiouð&+ disabledethernet-phy@0u*mdio@8c3f000fsl,fman-memac-mdiou&+ disabledethernet-phy@0u+mdio@8c43000fsl,fman-memac-mdiou0&+ disabledethernet-phy@0u,fsl-mc@80c000000 fsl,qoriq-mc u @4+0l dpmacs+ethernet@1fsl,qoriq-mc-dpmacuethernet@2fsl,qoriq-mc-dpmacuethernet@3fsl,qoriq-mc-dpmacuethernet@4fsl,qoriq-mc-dpmacuethernet@5fsl,qoriq-mc-dpmacuethernet@6fsl,qoriq-mc-dpmacuethernet@7fsl,qoriq-mc-dpmacuethernet@8fsl,qoriq-mc-dpmacu ethernet@9fsl,qoriq-mc-dpmacu !"sgmiiethernet@afsl,qoriq-mc-dpmacu #$sgmiiethernet@bfsl,qoriq-mc-dpmacu %&sgmiiethernet@cfsl,qoriq-mc-dpmacu '(sgmiiethernet@dfsl,qoriq-mc-dpmacu )ethernet@efsl,qoriq-mc-dpmacu*ethernet@ffsl,qoriq-mc-dpmacu+ethernet@10fsl,qoriq-mc-dpmacu,iommu@5000000 arm,mmu-500u '| spi@2100000okay"fsl,ls2080a-dspifsl,ls2085a-dspi+u  y4dspi9flash@0+ st,m25p80M-uflash@1+ st,m25p80M-uflash@2+ st,m25p80M-uesdhc@2140000okayfsl,ls2080a-esdhcfsl,esdhcu  y_ n&gpio@2300000 fsl,ls2080a-gpiofsl,qoriq-gpiou0 $&s[gpio@2310000 fsl,ls2080a-gpiofsl,qoriq-gpiou1 $&s[gpio@2320000 fsl,ls2080a-gpiofsl,qoriq-gpiou2 %&s[gpio@2330000 fsl,ls2080a-gpiofsl,qoriq-gpiou3 %&s[i2c@2000000okayfsl,vf610-i2c+u "4i2c yi2c-mux@77 nxp,pca9547uw+i2c@0+urtc@68dallas,ds3232uhi2c@2+uina220@40 ti,ina220u@ina220@41 ti,ina220uAi2c@3+uadt7481@4c adi,adt7461uLi2c@2010000 disabledfsl,vf610-i2c+u "4i2c yi2c@2020000 disabledfsl,vf610-i2c+u #4i2c yi2c@2030000 disabledfsl,vf610-i2c+u #4i2c ymemory-controller@2240000fsl,ifcu$ &+<l0 okaynor@0,0+ cfi-flash unand@2,0 fsl,ifc-nand uboard-control@3,0+.fsl,ls208xaqds-fpgafsl,fpga-qixissimple-mfd ulmdio-mux-emi1@54mdio-mux-mmioregmdio-mux-uT+mdio@60u`+mdio-phy0@1cu"mdio-phy1@1du$mdio-phy2@1eu&mdio-phy3@1fu(spi@20c0000fsl,ls2080a-qspi+ u  QuadSPIQuadSPI-memory y 4qspi_enqspiokayflash@0+ st,m25p80M1-uflash@2+ st,m25p80M1-upcie@3400000fsl,ls2088a-pcie regsconfig l intr+ipci0=[N@mnop disabled u@ 8l @ @@pcie@3500000fsl,ls2088a-pcie regsconfig q intr+ipci0=[N@rstu disabled uP( 8l(@(@@pcie@3600000fsl,ls2088a-pcie regsconfig v intr+ipci0=[N@wxyz disabled u`0 8l0@0@@pcie@3700000fsl,ls2088a-pcie regsconfig { intr+ipci0=[N@|}~ disabled up8 8l8@8@@sata@3200000okayfsl,ls2080a-ahciu   ysata@3210000okayfsl,ls2080a-ahciu!  ybus+ simple-buslusb@3100000 snps,dwc3u PGhostO rokayusb@3110000 snps,dwc3u QGhostO rokayccn@4000000 arm,ccn-504u  power-controller@1e34040%fsl,ls208xa-rcpmfsl,qoriq-rcpm-2.1+u@@&.timer@2800000fsl,ls208xa-ftm-alarmu.@ ,memory-controller@1080000fsl,qoriq-memory-controlleru &memory-controller@1090000fsl,qoriq-memory-controlleru  &firmwareopteelinaro,optee-tzsmcchosenserial0:115200n8 compatibleinterrupt-parent#address-cells#size-cellsmodelcryptortc1serial0serial1serial2serial3device_typeregclockscpu-idle-statesnext-level-cache#cooling-cellsphandlecache-levelcache-unifiedidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-us#clock-cellsclock-frequencyclock-output-names#interrupt-cellsrangesinterrupt-controllerinterruptsmsi-controllerregmapoffsetmaskpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicemethoddma-rangeslittle-endianclock-namesinterrupt-mapinterrupt-map-maskfsl,tmu-rangefsl,tmu-calibration#thermal-sensor-cellsfsl,sec-eradma-coherentfsl,extts-fifostatusmsi-parentiommu-mappcs-handlephy-handlephy-connection-type#global-interrupts#iommu-cellsstream-match-maskspi-num-chipselectsspi-max-frequencyvoltage-rangessdhci,auto-cmd12bus-widthmmc-hs200-1_8vgpio-controller#gpio-cellsshunt-resistorbank-widthdevice-widthmdio-parent-busmux-maskreg-namesspi-rx-bus-widthspi-tx-bus-widthinterrupt-namesnum-viewportbus-rangedr_modesnps,quirk-frame-length-adjustmentsnps,dis_rxdet_inp3_quirksnps,incr-burst-type-adjustment#fsl,rcpm-wakeup-cellsfsl,rcpm-wakeupstdout-path