ھ8( Texas Instruments AM68 SKti,am68-skti,j721s2"1chosen=serial2:115200n8cpus"1cpu-mapcluster0core0Icore1Icpu@0arm,cortex-a72MQcpu]pscikx@@cpu@1arm,cortex-a72MQcpu]pscikx@@l2-cache0cachemz@l3-cache0cachefirmwareopteelinaro,optee-tzdsmcpsci arm,psci-1.0dsmctimer-cl0-cpu0arm,armv8-timer0   pmuarm,cortex-a72-pmu bus@100000 simple-bus"1X`` ddpeepoo1pp@00 @AAN N (8(8@ @ @@AAA@A@AABB$EE@FF GGPPbus@28380000 simple-bus"18(8(8@ @ @@AAA@A@AABB$EE@FF GGPPsystem-controller@44083000 ti,k2g-sci rxtx  %debug_messagesMD0power-controllerti,sci-pm-domain/ clock-controllerti,k2g-sci-clkCreset-controller ti,sci-resetPchipid@43000014ti,am654-chipidMCmailbox@43600000ti,am654-secure-proxy]%target_datartscfg0MC`DD idisabledsram@41c00000 mmio-sramMAA"1pinctrl@4301c000pinctrl-singleMC4p pinctrl@4301c038pinctrl-singleMC8,p pinctrl@4301c068pinctrl-singleMCh p wkup-i2c0-default-pinswkup-uart0-default-pins ptHL mcu-cpsw-default-pins`,($  mcu-mdio-default-pins40mcu-mcan0-default-pinsTPmcu-mcan1-default-pinslhmcu-i2c0-default-pinsmcu-i2c1-default-pinsx|mcu-uart0-default-pins mcu-rpi-header-gpio0-default-pins-0H\`Xd pinctrl@4301c190pinctrl-singleMCp mcu-rpi-header-gpio0-default-pins-1pinctrl@40f04200pinctrl-singleM@B(p  ireservedpinctrl@40f04280pinctrl-singleM@B(p  ireservedinterrupt-controller@42200000 ti,sci-intrMB  }  syscon@40f00000sysconsimple-mfdM@"1@phy@4040ti,am654-phy-gmii-selM@@2timer@40400000ti,am654-timerM@@ 0 =#Dfck P# `# w # ireservedtimer@40410000ti,am654-timerM@A 1 =SDfck PS `S w S ireservedtimer@40420000ti,am654-timerM@B 2 =TDfck PT `T w T ireservedtimer@40430000ti,am654-timerM@C 3 =UDfck PU `U w U ireservedtimer@40440000ti,am654-timerM@D 4 =VDfck PV `V w V ireservedtimer@40450000ti,am654-timerM@E 5 =WDfck PW `W w W ireservedtimer@40460000ti,am654-timerM@F 6 =XDfck PX `X w X ireservedtimer@40470000ti,am654-timerM@G 7 =YDfck PY `Y w Y ireservedtimer@40480000ti,am654-timerM@H 8 =ZDfck PZ `Z w Z ireservedtimer@40490000ti,am654-timerM@I 9 =[Dfck P[ `[ w [ ireservedserial@42300000ti,j721e-uartti,am654-uartMB0  =gDfclk w g ireserveddefault serial@40a00000ti,j721e-uartti,am654-uartM@ N =Dfclk w iokaydefault gpio@42110000ti,j721e-gpioti,keystone-gpioMB ghijklY w s =sDgpioiokaydefault gpio@42100000ti,j721e-gpioti,keystone-gpioMB pqrstuY w t =tDgpio idisabledi2c@42120000ti,j721e-i2cti,omap4-i2cMB "1 =Dfck w iokaydefaulteeprom@51 atmel,24c512MQi2c@40b00000ti,j721e-i2cti,omap4-i2cM@ T"1 =Dfck w iokaydefaulti2c@40b10000ti,j721e-i2cti,omap4-i2cM@ U"1 =Dfck w iokaydefault=gpio@20 ti,tca6408M *HDMI_PDnHDMI_LS_OEDP0_3V3_ENeDP_ENABLE?can@40528000 bosch,m_can M@R@P%m_canmessage_ram w = Dhclkcclk@A int0int1 &@@@@ iokaydefault5can@40568000 bosch,m_can M@V@T%m_canmessage_ram w = DhclkcclkCD int0int1 &@@@@ iokaydefault5spi@40300000ti,am654-mcspiti,omap4-mcspiM@0 P"1 w [ =[ idisabledspi@40310000ti,am654-mcspiti,omap4-mcspiM@1 Q"1 w \ =\ idisabledspi@40320000ti,am654-mcspiti,omap4-mcspiM@2 R"1 w ] =] idisabledbus@28380000 simple-mfd"1(8(8:G ringacc@2b800000ti,am654-navss-ringaccPM+@+@(Y*P(D%%rtfifosproxy_gcfgproxy_targetcfgR_ xdma-controller@285c0000ti,j721e-navss-mcu-udmap0M(\**%gcfgrchanrttchanrtx   mailbox@2a480000ti,am654-secure-proxy]%target_datartscfg0M*H*8*@ idisabledethernet@46000000ti,j721e-cpsw-nuss"1MF  %cpsw_nussF : =Dfck w Hp#tx0tx1tx2tx3tx4tx5tx6tx7rxdefaultethernet-ports"1port@1Mport15  rgmii-rxidmdio@f00ti,cpsw-mdioti,davinci_mdioM"1 =Dfck B@ethernet-phy@0M)>Lcpts@3d000 ti,am65-cptsM =Dcpts P `dZcptsxtscadc@40200000ti,am3359-tscadcM@  \ w  = PDfcktt fifo0fifo1 idisabledadcti,am3359-adctscadc@40210000ti,am3359-tscadcM@! ] w  = PDfcktt fifo0fifo1 idisabledadcti,am3359-adcbus@47000000 simple-bus"1HGGspi@47040000ti,am654-ospicdns,qspi-nor MG H =m Pm `m ! w m"1 idisabledspi@47050000ti,am654-ospicdns,qspi-nor MG I =n w n"1 idisabledtemperature-sensor@42040000 ti,j7200-vtm MBPBP w 6sram@70000000 mmio-sramMp@"1p@atf-sram@0Mtifs-sram@1f0000Ml3cache-sram@200000M syscon@104000-ti,j721e-system-controllersysconsimple-mfdM@"1@-mux-controller@0 mmio-muxM,phy@34ti,am654-phy-gmii-selM42*mux-controller@80 mmio-muxM ,clock-controller@140ti,am654-ehrpwm-tbclkM@Cpwm@3000000!ti,am654-ehrpwmti,am3352-ehrpwm:M w = Dtbclkfck idisabledpwm@3010000!ti,am654-ehrpwmti,am3352-ehrpwm:M w = Dtbclkfck idisabledpwm@3020000!ti,am654-ehrpwmti,am3352-ehrpwm:M w = Dtbclkfck idisabledpwm@3030000!ti,am654-ehrpwmti,am3352-ehrpwm:M w = Dtbclkfck idisabledpwm@3040000!ti,am654-ehrpwmti,am3352-ehrpwm:M w = Dtbclkfck idisabledpwm@3050000!ti,am654-ehrpwmti,am3352-ehrpwm:M w = Dtbclkfck idisabledinterrupt-controller@1800000 arm,gic-v3"1PMo oo   msi-controller@1820000arm,gic-v3-itsME@ap.interrupt-controller@a00000 ti,sci-intrM  8!pinctrl@11c000pinctrl-singleM p main-uart8-default-pins   main-i2c0-default-pins#main-mmc1-default-pins8%vdd-sd-dv-default-pins:main-usbss0-default-pinsmain-mcan6-default-pins0main-mcan7-default-pins2main-i2c4-default-pins$rpi-header-gpio0-default-pinspl 4"dss-vout0-default-pinstpLHD@<80,(|$ hd`\XTPx4hdmi-hpd-default-pins<pinctrl@104200pinctrl-singleMBPp pinctrl@104280pinctrl-singleMB p crypto@4e00000ti,j721e-sa2ulM w )"1@J@JA txrx1rx2rng@4e10000inside-secure,safexcel-eip76M} timer@2400000ti,am654-timerM@  =?Dfck P? `? w ?timer@2410000ti,am654-timerMA  =@Dfck P@ `@ w @timer@2420000ti,am654-timerMB  =ADfck PA `A w Atimer@2430000ti,am654-timerMC  =BDfck PB `B w Btimer@2440000ti,am654-timerMD  =CDfck PC `C w Ctimer@2450000ti,am654-timerME  =DDfck PD `D w Dtimer@2460000ti,am654-timerMF  =EDfck PE `E w Etimer@2470000ti,am654-timerMG  =FDfck PF `F w Ftimer@2480000ti,am654-timerMH  =GDfck PG `G w Gtimer@2490000ti,am654-timerMI  =HDfck PH `H w Htimer@24a0000ti,am654-timerMJ  =IDfck PI `I w Itimer@24b0000ti,am654-timerMK  =JDfck PJ `J w Jtimer@24c0000ti,am654-timerML  =KDfck PK `K w Ktimer@24d0000ti,am654-timerMM  =LDfck PL `L w Ltimer@24e0000ti,am654-timerMN  =MDfck PM `M w Mtimer@24f0000ti,am654-timerMO  =NDfck PN `N w Ntimer@2500000ti,am654-timerMP  =ODfck PO `O w Otimer@2510000ti,am654-timerMQ  =PDfck PP `P w Ptimer@2520000ti,am654-timerMR  =QDfck PQ `Q w Qtimer@2530000ti,am654-timerMS  =RDfck PR `R w Rserial@2800000ti,j721e-uartti,am654-uartM  =Dfclk w  idisabledserial@2810000ti,j721e-uartti,am654-uartM  =^Dfclk w ^ idisabledserial@2820000ti,j721e-uartti,am654-uartM  =_Dfclk w _ idisabledserial@2830000ti,j721e-uartti,am654-uartM  =`Dfclk w ` idisabledserial@2840000ti,j721e-uartti,am654-uartM  =aDfclk w a idisabledserial@2850000ti,j721e-uartti,am654-uartM  =bDfclk w b idisabledserial@2860000ti,j721e-uartti,am654-uartM  =cDfclk w c idisabledserial@2870000ti,j721e-uartti,am654-uartM  =dDfclk w d idisabledserial@2880000ti,j721e-uartti,am654-uartM  =eDfclk w eiokaydefault serial@2890000ti,j721e-uartti,am654-uartM  =fDfclk w f idisabledgpio@600000ti,j721e-gpioti,keystone-gpioM`!B w o =oDgpioiokaydefault";gpio@610000ti,j721e-gpioti,keystone-gpioMa!B w p =pDgpio idisabledgpio@620000ti,j721e-gpioti,keystone-gpioMb!B w q =qDgpio idisabledgpio@630000ti,j721e-gpioti,keystone-gpioMc!B w r =rDgpio idisabledi2c@2000000ti,j721e-i2cti,omap4-i2cM "1 =Dfck w default#gpio@21 ti,tca6416M!l BOARDID_EEPROM_WPCAN_STB GPIO_uSD_PWR_EN IO_EXP_PCIe1_M.2_RTSzIO_EXP_MCU_RGMII_RST# 9i2c@2010000ti,j721e-i2cti,omap4-i2cM "1 =Dfck w  idisabledi2c@2020000ti,j721e-i2cti,omap4-i2cM "1 =Dfck w  idisabledi2c@2030000ti,j721e-i2cti,omap4-i2cM "1 =Dfck w  idisabledi2c@2040000ti,j721e-i2cti,omap4-i2cM "1 =Dfck w iokaydefault$i2c@2050000ti,j721e-i2cti,omap4-i2cM "1 =Dfck w  idisabledi2c@2060000ti,j721e-i2cti,omap4-i2cM "1 =Dfck w  idisabledmmc@4f80000ti,j721e-sdhci-8bit M  w b=bbDclk_ahbclk_xin Pb `b{ #w1?JWf: idisabledmmc@4fb0000ti,j721e-sdhci-4bit M  w c=ccDclk_ahbclk_xin Pc `c{u  &1?:<iokay%defaultLW&c'bus@30000000 simple-mfd"100 @:Ginterrupt-controller@310e0000 ti,sci-intrM1@ $@@@@@(msi-controller@33d00000 ti,sci-intaM3(a   mailbox@32c00000ti,am654-secure-proxy]%target_datartscfg0M22@2rx_011 %spinlock@30e00000ti,am654-hwspinlockM0pmailbox@31f80000ti,am654-mailboxM1]~( idisabledmailbox@31f81000ti,am654-mailboxM1]~( idisabledmailbox@31f82000ti,am654-mailboxM1 ]~( idisabledmailbox@31f83000ti,am654-mailboxM10]~( idisabledmailbox@31f84000ti,am654-mailboxM1@]~( idisabledmailbox@31f85000ti,am654-mailboxM1P]~( idisabledmailbox@31f86000ti,am654-mailboxM1`]~( idisabledmailbox@31f87000ti,am654-mailboxM1p]~( idisabledmailbox@31f88000ti,am654-mailboxM1]~( idisabledmailbox@31f89000ti,am654-mailboxM1]~( idisabledmailbox@31f8a000ti,am654-mailboxM1]~( idisabledmailbox@31f8b000ti,am654-mailboxM1]~( idisabledmailbox@31f90000ti,am654-mailboxM1]~( idisabledmailbox@31f91000ti,am654-mailboxM1]~( idisabledmailbox@31f92000ti,am654-mailboxM1 ]~( idisabledmailbox@31f93000ti,am654-mailboxM10]~( idisabledmailbox@31f94000ti,am654-mailboxM1@]~( idisabledmailbox@31f95000ti,am654-mailboxM1P]~( idisabledmailbox@31f96000ti,am654-mailboxM1`]~( idisabledmailbox@31f97000ti,am654-mailboxM1p]~( idisabledmailbox@31f98000ti,am654-mailboxM1]~( idisabledmailbox@31f99000ti,am654-mailboxM1]~( idisabledmailbox@31f9a000ti,am654-mailboxM1]~( idisabledmailbox@31f9b000ti,am654-mailboxM1]~( idisabledringacc@3c000000ti,am654-navss-ringaccPM<@8@131%%rtfifosproxy_gcfgproxy_targetcfgR_ x)dma-controller@31150000ti,j721e-navss-main-udmap0M145 %gcfgrchanrttchanrtx )    cpts@310d0000ti,j721e-cptsM1 %cpts =Dcpts P `d(cptsxethernet@c200000ti,j721e-cpsw-nussM  %cpsw_nuss "1: =Dfck w H@ABCDEFGF@#tx0tx1tx2tx3tx4tx5tx6tx7rx idisabledethernet-ports"1port@1Mport15* idisabledmdio@f00ti,cpsw-mdioti,davinci_mdioM"1 =Dfck B@ idisabledcpts@3d000 ti,am65-cptsM =Dcptsdcptsxcdns-usb@4104000 ti,j721e-usbM@=hhDreflpm Ph `h w h"1: idisabledusb@6000000 cdns,usb30M %otgxhcidev$`fxhostperipheralotg super-speedotgwiz@5060000ti,j721s2-wiz-10g"1 w m=mm+Dfckcore_ref_clkext_ref_clkPC Pm `m,serdes@5060000ti,j721e-serdes-10gM %torrent_phy,torrent_reset=,,Drefclkphy_en_refclkP,,,$`mmm"1C idisabledpcie@2910000&ti,j7200-pcie-hostti,j721e-pcie-host@Mp %intd_cfguser_cfgregcfg link_state JQpci-t w  =)Dfck"1L .:8G`1//// idisabledinterrupt-controller D/can@2701000 bosch,m_can Mpp%m_canmessage_ram w = Dhclkcclk|} int0int1 &@@@@  idisabledcan@2711000 bosch,m_can Mqq%m_canmessage_ram w = Dhclkcclk int0int1 &@@@@  idisabledcan@2721000 bosch,m_can Mrr%m_canmessage_ram w = Dhclkcclk int0int1 &@@@@  idisabledcan@2731000 bosch,m_can Mss%m_canmessage_ram w = Dhclkcclk int0int1 &@@@@  idisabledcan@2741000 bosch,m_can Mtt%m_canmessage_ram w = Dhclkcclk int0int1 &@@@@  idisabledcan@2751000 bosch,m_can Muu%m_canmessage_ram w = Dhclkcclk int0int1 &@@@@  idisabledcan@2761000 bosch,m_can Mvv%m_canmessage_ram w = Dhclkcclk int0int1 &@@@@ iokaydefault051can@2771000 bosch,m_can Mww%m_canmessage_ram w = Dhclkcclk int0int1 &@@@@ iokaydefault253can@2781000 bosch,m_can Mxx%m_canmessage_ram w = Dhclkcclk@A int0int1 &@@@@  idisabledcan@2791000 bosch,m_can Myy%m_canmessage_ram w = DhclkcclkCD int0int1 &@@@@  idisabledcan@27a1000 bosch,m_can Mzz%m_canmessage_ram w = DhclkcclkFG int0int1 &@@@@  idisabledcan@27b1000 bosch,m_can M{{%m_canmessage_ram w = DhclkcclkIJ int0int1 &@@@@  idisabledcan@27c1000 bosch,m_can M||%m_canmessage_ram w = DhclkcclkLM int0int1 &@@@@  idisabledcan@27d1000 bosch,m_can M}}%m_canmessage_ram w = DhclkcclkOP int0int1 &@@@@  idisabledcan@2681000 bosch,m_can Mhh%m_canmessage_ram w = DhclkcclkRS int0int1 &@@@@  idisabledcan@2691000 bosch,m_can Mii%m_canmessage_ram w = DhclkcclkUV int0int1 &@@@@  idisabledcan@26a1000 bosch,m_can Mjj%m_canmessage_ram w = Dhclkcclk int0int1 &@@@@  idisabledcan@26b1000 bosch,m_can Mkk%m_canmessage_ram w = Dhclkcclk int0int1 &@@@@  idisabledspi@2100000ti,am654-mcspiti,omap4-mcspiM "1 w S =S idisabledspi@2110000ti,am654-mcspiti,omap4-mcspiM "1 w T =T idisabledspi@2120000ti,am654-mcspiti,omap4-mcspiM "1 w U =U idisabledspi@2130000ti,am654-mcspiti,omap4-mcspiM "1 w V =V idisabledspi@2140000ti,am654-mcspiti,omap4-mcspiM "1 w W =W idisabledspi@2150000ti,am654-mcspiti,omap4-mcspiM "1 w X =X idisabledspi@2160000ti,am654-mcspiti,omap4-mcspiM "1 w Y =Y idisabledspi@2170000ti,am654-mcspiti,omap4-mcspiM "1 w Z =Z idisableddss@4a00000 ti,j721e-dssMd%common_mcommon_s0common_s1common_s2vidl1vidl2vid1vid2ovr1ovr2ovr3ovr4vp1vp2vp3vp4wb<=Dfckvp1vp2vp3vp4 w 0Z[\]'common_mcommon_s0common_s1common_s2iokaydefault40P0`ports"1port@1Mendpoint?5@thermal-zoneswkup0-thermalOes6tripswkup0-critH Xcriticalwkup1-thermalOes6tripswkup1-critH Xcriticalmain0-thermalOes6tripsmain0-critH Xcriticalmain1-thermalOes6tripsmain1-critH Xcriticalmain2-thermalOes6tripsmain2-critH Xcriticalmain3-thermalOes6tripsmain3-critH Xcriticalmain4-thermalOes6tripsmain4-critH Xcriticalclock-cmnrefclkC fixed-clock+memory@80000000Qmemory Mreserved-memory"1optee@9e800000Maliases)/bus@100000/bus@28380000/serial@42300000)/bus@100000/bus@28380000/serial@40a00000/bus@100000/serial@2880000/bus@100000/mmc@4fb0000&/bus@100000/bus@28380000/can@40528000&/bus@100000/bus@28380000/can@40568000/bus@100000/can@2761000/bus@100000/can@2771000regulator-vusb-main5v0regulator-fixed vusb-main5v0LK@LK@  %7regulator-vsys3v3regulator-fixed vsys_3v32Z2Z 77  %8regulator-sdregulator-fixed vdd_mmc12Z2Z % B 78 9&regulator-tlv71033regulator-gpio tlv71033default:w@2Z % 78 U;1 [w@2Z'regulator-vsys-io-1v8regulator-fixed vsys_io_1v8w@w@  %regulator-vsys-io-1v2regulator-fixed vsys_io_1v2OO  %can-phy0 ti,tcan10422 bLK@can-phy1 ti,tcan10422 bLK@can-phy2 ti,tcan10422 bLK@1can-phy3 ti,tcan10422 bLK@3connector-hdmihdmi-connectorhdmiXadefault< n= z;portendpoint?>Abridge-dvi ti,tfp410 ? ports"1port@0Mendpoint?@ 5port@1Mendpoint?A> modelcompatibleinterrupt-parent#address-cells#size-cellsstdout-pathcpuregdevice_typeenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachephandlecache-unifiedcache-levelinterruptsrangesti,host-idmbox-namesmboxesreg-names#power-domain-cells#clock-cells#reset-cells#mbox-cellsstatus#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsti,intr-trigger-typeinterrupt-controller#interrupt-cellsti,sciti,sci-dev-idti,interrupt-ranges#phy-cellsclocksclock-namesassigned-clocksassigned-clock-parentspower-domainsti,timer-pwmcurrent-speedpinctrl-namespinctrl-0gpio-controller#gpio-cellsti,ngpioti,davinci-gpio-unbankedclock-frequencygpio-line-namesinterrupt-namesbosch,mram-cfgphysdma-coherentdma-rangesti,num-ringsti,sci-rm-range-gp-ringsmsi-parent#dma-cellsti,ringaccti,sci-rm-range-tchanti,sci-rm-range-rchanti,sci-rm-range-rflowdmasdma-namesti,mac-onlylabelti,syscon-efusephy-modephy-handlebus_freqti,rx-internal-delayti,fifo-depthti,min-output-impedanceinterrupts-extendedti,cpts-ext-ts-inputsti,cpts-periodic-outputsassigned-clock-rates#io-channel-cellscdns,fifo-depthcdns,fifo-widthcdns,trigger-address#thermal-sensor-cells#mux-control-cellsmux-reg-masks#pwm-cellssocionext,synquacer-pre-itsmsi-controller#msi-cellsbus-widthti,otap-del-sel-legacyti,otap-del-sel-mmc-hsti,otap-del-sel-ddr52ti,otap-del-sel-hs200ti,otap-del-sel-hs400ti,itap-del-sel-legacyti,itap-del-sel-mmc-hsti,strobe-selti,clkbuf-selti,trm-icpmmc-ddr-1_8vmmc-hs200-1_8vmmc-hs400-1_8vti,otap-del-sel-sd-hsti,otap-del-sel-sdr12ti,otap-del-sel-sdr25ti,otap-del-sel-sdr50ti,otap-del-sel-sdr104ti,otap-del-sel-ddr50ti,itap-del-sel-sd-hsti,itap-del-sel-sdr12ti,itap-del-sel-sdr25sdhci-caps-maskdisable-wpvmmc-supplyvqmmc-supply#hwlock-cellsti,mbox-num-usersti,mbox-num-fifosmaximum-speeddr_modenum-lanesresetsreset-namesti,syscon-pcie-ctrlmax-link-speedbus-rangevendor-iddevice-idmsi-mapinterrupt-map-maskinterrupt-mapremote-endpointpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisno-mapserial0serial1serial2mmc1can0can1can2can3regulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvin-supplyenable-active-highgpiosstatesmax-bitrateddc-i2c-bushpd-gpiospowerdown-gpiosti,deskewpclk-sample