B8? (>$mediatek,mt8186-evbmediatek,mt8186 +!7MediaTek MT8186 evaluation boardcpus+cpu-mapcluster0core0=core1=core2=core3=core4=core5=cluster1core0=core1= cpu@0Acpuarm,cortex-a55MQpsci_w5o~  cpu@100Acpuarm,cortex-a55MQpsci_w5o~  cpu@200Acpuarm,cortex-a55MQpsci_w5o~  cpu@300Acpuarm,cortex-a55MQpsci_w5o~  cpu@400Acpuarm,cortex-a55MQpsci_w5o~  cpu@500Acpuarm,cortex-a55MQpsci_w5o~  cpu@600Acpuarm,cortex-a76MQpsci_z0o cpu@700Acpuarm,cortex-a76MQpsci_z0o  idle-statespscicpu-off-larm,idle-state2d@ cpu-off-barm,idle-state2dx cluster-off-larm,idle-stated4 cluster-off-barm,idle-statedll2-cache0cache l2-cache1cachel3-cachecacheoscillator-13m fixed-clock!_]@.clk13moscillator-26m fixed-clock!_.clk26moscillator-32k fixed-clock!_.clk32kpmu-a55arm,cortex-a55-pmu Apmu-a76arm,cortex-a76-pmu Apsci arm,psci-1.0Xsmctimerarm,armv8-timer @A   soc+ simple-busLinterrupt-controller@c000000 arm,gic-v3Sd { M   A ppi-partitionsinterrupt-partition-0interrupt-partition-1 syscon@c53a000mediatek,mt8186-mcusyssysconM S!syscon@10000000 mediatek,mt8186-topckgensysconM!syscon@10001000#mediatek,mt8186-infracfg_aosysconM!syscon@10003000mediatek,mt8186-pericfgsysconM0pinctrl@10005000mediatek,mt8186-pinctrlMP "$&*,Biocfg0iocfg_ltiocfg_lmiocfg_lbiocfg_bliocfg_rbiocfg_rteint{ASi2c0-default-pinspins-busi2c1-default-pinspins-busi2c2-default-pinspins-busi2c3-default-pinspins-busi2c4-default-pinspins-busi2c5-default-pinspins-busi2c6-default-pinspins-busi2c7-default-pins pins-busi2c8-default-pins!pins-busi2c9-default-pins"pins-buswatchdog@10007000(mediatek,mt8186-wdtmediatek,mt6589-wdtMpsyscon@1000c000"mediatek,mt8186-apmixedsyssysconM!#pwrap@1000d000mediatek,mt8186-pwrapsysconMpwrapA6 =spiwraptimer@10017000,mediatek,mt8186-timermediatek,mt6765-timerMpA6scp@10500000mediatek,mt8186-scp MP\ sramcfgAspi@11000000mediatek,mt8186-norM 63Ocd=spisfaxiaxi_sI3YXA% pdisabledadc@11001000.mediatek,mt8186-auxadcmediatek,mt8173-auxadcMw6"=mainserial@11002000*mediatek,mt8186-uartmediatek,mt6577-uartM Ap 6 =baudbuspokayserial@11003000*mediatek,mt8186-uartmediatek,mt6577-uartM0Aq 6 =baudbus pdisabledi2c@11007000mediatek,mt8186-i2c Mp Ai6' =maindma+pokay_defaulti2c@11008000mediatek,mt8186-i2c M Aj6' =maindma+pokay_@defaulti2c@11009000mediatek,mt8186-i2c M Ak6' =maindma+pokay_'defaulti2c@1100f000mediatek,mt8186-i2c M Al6' =maindma+pokay_defaulti2c@11011000mediatek,mt8186-i2c M Am6' =maindma+pokay_defaulti2c@11016000mediatek,mt8186-i2c M` Ab6' =maindma+pokay_defaulti2c@1100d000mediatek,mt8186-i2c M Ac6' =maindma+pokay_defaulti2c@11004000mediatek,mt8186-i2c M@ An6' =maindma+pokay_default i2c@11005000mediatek,mt8186-i2c MP Ao6' =maindma+pokay_default!spi@1100a000(mediatek,mt8186-spimediatek,mt6765-spi+MA6K =parent-clksel-clkspi-clk pdisabledpwm@1100e0002mediatek,mt8186-disp-pwmmediatek,mt8183-disp-pwmMA64=mainmm pdisabledspi@11010000(mediatek,mt8186-spimediatek,mt6765-spi+MA6K 8=parent-clksel-clkspi-clk pdisabledspi@11012000(mediatek,mt8186-spimediatek,mt6765-spi+M A6K ;=parent-clksel-clkspi-clk pdisabledspi@11013000(mediatek,mt8186-spimediatek,mt6765-spi+M0A6K <=parent-clksel-clkspi-clk pdisabledspi@11014000(mediatek,mt8186-spimediatek,mt6765-spi+M@At6K J=parent-clksel-clkspi-clk pdisabledspi@11015000(mediatek,mt8186-spimediatek,mt6765-spi+MPAu6K K=parent-clksel-clkspi-clk pdisabledclock-controller@11017000mediatek,mt8186-imp_iic_wrapMp!serial@11018000*mediatek,mt8186-uartmediatek,mt6577-uartMA 6 =baudbus pdisabledi2c@11019000mediatek,mt8186-i2c M Ad6 ' =maindma+pokay_default"mmc@11230000(mediatek,mt8186-mmcmediatek,mt8183-mmc M#6 U=sourcehclksource_cgAdI Y# pdisabledmmc@11240000(mediatek,mt8186-mmcmediatek,mt8183-mmc M$6V=sourcehclksource_cgAeIYo pdisabledt-phy@11c80000.mediatek,mt8186-tphymediatek,generic-tphy-v2+Lpokayusb-phy@0M6=refusb-phy@700M 6=reft-phy@11ca0000.mediatek,mt8186-tphymediatek,generic-tphy-v2+Lpokayusb-phy@0M6=refefuse@11cb0000%mediatek,mt8186-efusemediatek,efuseM+dsi-phy@11cc0000mediatek,mt8183-mipi-txM6! .mipi_tx0_pll pdisabledclock-controller@13000000mediatek,mt8186-mfgsysM!syscon@14000000mediatek,mt8186-mmsyssysconM!clock-controller@14020000mediatek,mt8186-wpesysM!clock-controller@15020000mediatek,mt8186-imgsys1M!clock-controller@15820000mediatek,mt8186-imgsys2M!clock-controller@1602f000mediatek,mt8186-vdecsysM!clock-controller@17000000mediatek,mt8186-vencsysM!clock-controller@1a000000mediatek,mt8186-camsysM!clock-controller@1a04f000mediatek,mt8186-camsys_rawaM!clock-controller@1a06f000mediatek,mt8186-camsys_rawbM!clock-controller@1b000000mediatek,mt8186-mdpsysM!clock-controller@1c000000mediatek,mt8186-ipesysM!aliases/soc/serial@11002000chosenserial0:921600n8memory@40000000AmemoryM@ compatibleinterrupt-parent#address-cells#size-cellsmodelcpudevice_typeregenable-methodclock-frequencycapacity-dmips-mhzcpu-idle-statesnext-level-cache#cooling-cellsphandleentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-us#clock-cellsclock-output-namesinterruptsranges#interrupt-cells#redistributor-regionsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangespinmuxbias-disabledrive-strength-microampinput-enablebias-pull-upmediatek,disable-extrstclocksclock-namesassigned-clocksassigned-clock-parentsstatus#io-channel-cellsclock-divpinctrl-namespinctrl-0i2c-scl-internal-delay-ns#pwm-cells#phy-cellsmediatek,discthserial0stdout-path