~w8pH(/p  ,LG V35 ThinQ2lg,judypqcom,sdm845aliases!=/soc@0/geniqup@8c0000/i2c@880000!B/soc@0/geniqup@8c0000/i2c@884000!G/soc@0/geniqup@8c0000/i2c@888000!L/soc@0/geniqup@8c0000/i2c@88c000!Q/soc@0/geniqup@8c0000/i2c@890000!V/soc@0/geniqup@8c0000/i2c@894000![/soc@0/geniqup@8c0000/i2c@898000!`/soc@0/geniqup@8c0000/i2c@89c000!e/soc@0/geniqup@ac0000/i2c@a80000!j/soc@0/geniqup@ac0000/i2c@a84000!o/soc@0/geniqup@ac0000/i2c@a88000!u/soc@0/geniqup@ac0000/i2c@a8c000!{/soc@0/geniqup@ac0000/i2c@a90000!/soc@0/geniqup@ac0000/i2c@a94000!/soc@0/geniqup@ac0000/i2c@a98000!/soc@0/geniqup@ac0000/i2c@a9c000!/soc@0/geniqup@8c0000/spi@880000!/soc@0/geniqup@8c0000/spi@884000!/soc@0/geniqup@8c0000/spi@888000!/soc@0/geniqup@8c0000/spi@88c000!/soc@0/geniqup@8c0000/spi@890000!/soc@0/geniqup@8c0000/spi@894000!/soc@0/geniqup@8c0000/spi@898000!/soc@0/geniqup@8c0000/spi@89c000!/soc@0/geniqup@ac0000/spi@a80000!/soc@0/geniqup@ac0000/spi@a84000!/soc@0/geniqup@ac0000/spi@a88000!/soc@0/geniqup@ac0000/spi@a8c000!/soc@0/geniqup@ac0000/spi@a90000!/soc@0/geniqup@ac0000/spi@a94000!/soc@0/geniqup@ac0000/spi@a98000!/soc@0/geniqup@ac0000/spi@a9c000chosen framebuffer@9d4000002simple-framebuffer@  @ a8r8g8b8memory@80000000memoryreserved-memory hyp-mem@85700000p`xbl-mem@85e00000aop-mem@85fc0000aop-cmd-db-mem@85fe0000 2qcom,cmd-dbsmem@86000000 2qcom,smem "tz@86200000 camera-mem@8bf00000Pipa-gsi@8c410000APmemory@b2000000memory@8c415000AP *memory@8c400000@memory@8c500000P*$memory@8e3000000*memory@8e400000@*memory@96d00000P*memory@97200000 **memory@97a00000 *memory@97c00000@memory@99000000memory@9d400000@@memory@f0800000memory@f08010002qcom,rmtfs-mem 2Amemory@f0a01000cpus cpu@0cpu 2qcom,kryo385KpsciYcl"(psci *l2-cache2cache * l3-cache2cache* cpu@100cpu 2qcom,kryo385KpsciYcl"( psci *l2-cache2cache * cpu@200cpu 2qcom,kryo385KpsciYcl"( psci*l2-cache2cache *cpu@300cpu 2qcom,kryo385KpsciYcl"(psci*l2-cache2cache *cpu@400cpu 2qcom,kryo385KpsciYl(psci*l2-cache2cache *cpu@500cpu 2qcom,kryo385KpsciYl(psci*l2-cache2cache *cpu@600cpu 2qcom,kryo385KpsciYl(psci* l2-cache2cache *cpu@700cpu 2qcom,kryo385KpsciYl(psci*!l2-cache2cache *cpu-mapcluster0core0core1core2core3core4core5core6 core7!idle-statespscicpu-sleep-0-02arm,idle-state little-rail-power-collapse@2^CSbd*-cpu-sleep-1-02arm,idle-state big-rail-power-collapse@2CmSd*.domain-idle-statescluster-sleep-02domain-idle-state cluster-power-collapseAD2 CS'd*/opp-table-cpu02operating-points-v2u*opp-300000000 5I>opp-403200000X 5I>opp-4800000008 5bpopp-576000000"U 5bpopp-652800000& 5u0opp-748800000,opp-82560000015opp-9024000005Ɉ`opp-979200000:]hopp-1056000000>Hopp-1132800000C(!b@opp-1228800000I>!bopp-1324800000N!b opp-1420800000T.opp-1516800000Zh.'Popp-1612800000`!`>'Popp-1689600000d@>>opp-1766400000iI >V0opp-table-cpu42operating-points-v2u*opp-300000000 5I>opp-403200000X 5I>opp-4800000008I>opp-576000000"UI>opp-652800000&I>opp-748800000,I>opp-82560000015!bopp-9024000005Ɉ!bopp-979200000:]h!bopp-1056000000>H.opp-1132800000C(.opp-1209600000H>opp-1286400000L>opp-1363200000Q@>opp-1459200000V>opp-1536000000[Ropp-1612800000`!`Ropp-1689600000d@R'Popp-1766400000iI ^'Popp-1843200000m^'Popp-1920000000rpn'Popp-1996800000wn>opp-2092800000|n>opp-2169600000Qxn>opp-2246400000Xn>opp-2323200000y8n>opp-2400000000 nV0opp-2476800000nV0opp-25536000004nV0opp-2649600000nV0opp-2745600000nopp-2803200000pnpmu2arm,armv8-pmuv3 timer2arm,armv8-timer0clocksxo-board 2fixed-clockI xo_board*sleep-clk 2fixed-clock*0firmwarescm2qcom,scm-sdm845qcom,scmremoteproc-adsp2qcom,sdm845-adsp-pas@""""#wdogfatalreadyhandoverstop-ack#xo$%&/stopEokayLqcom/sdm845/judyp/adsp.mbnglink-edge Zlpass`p'apr 2qcom,apr-v2wapr_audio_svc apr-service@3 2qcom,q6coreavs/audiomsm/adsp/audio_pdapr-service@4 2qcom,q6afeavs/audiomsm/adsp/audio_pddais2qcom,q6afe-dais apr-service@7 2qcom,q6asmavs/audiomsm/adsp/audio_pddais2qcom,q6asm-dais  (!apr-service@8 2qcom,q6admavs/audiomsm/adsp/audio_pdrouting2qcom,q6adm-routingfastrpc 2qcom,fastrpcwfastrpcglink-apps-dspZadsp compute-cb@32qcom,fastrpc-compute-cb (#compute-cb@42qcom,fastrpc-compute-cb ($remoteproc-cdsp2qcom,sdm845-cdsp-pas@B))))#wdogfatalreadyhandoverstop-ack#xo*%+/stopEokayLqcom/sdm845/judyp/cdsp.mbnglink-edge >Zturing`p'fastrpc 2qcom,fastrpcwfastrpcglink-apps-dspZcdsp compute-cb@12qcom,fastrpc-compute-cb (0compute-cb@22qcom,fastrpc-compute-cb (0compute-cb@32qcom,fastrpc-compute-cb (0compute-cb@42qcom,fastrpc-compute-cb (0compute-cb@52qcom,fastrpc-compute-cb (0compute-cb@62qcom,fastrpc-compute-cb (0compute-cb@72qcom,fastrpc-compute-cb (0compute-cb@82qcom,fastrpc-compute-cb (0smp2p-cdsp 2qcom,smp2p^ @p'`master-kernelmaster-kernel*+slave-kernel slave-kernel*?*)smp2p-lpass 2qcom,smp2p p' `master-kernelmaster-kernel*&slave-kernel slave-kernel*?*"smp2p-mpss 2qcom,smp2p p'`master-kernelmaster-kernel*~slave-kernel slave-kernel*?*}ipa-ap-to-modemipa*{ipa-modem-to-apipa*?*ysmp2p-slpi 2qcom,smp2p p'`master-kernelmaster-kernelslave-kernel slave-kernel*?psci 2arm,psci-1.0Rsmcpower-domain-cpu0P,d-*power-domain-cpu1P,d-* power-domain-cpu2P,d-* power-domain-cpu3P,d-*power-domain-cpu4P,d.*power-domain-cpu5P,d.*power-domain-cpu6P,d.*power-domain-cpu7P,d.*power-domain-clusterPd/*,soc@0 w 2simple-busclock-controller@1000002qcom,gcc-sdm845##012=bi_tcxobi_tcxo_aosleep_clkpcie_0_pipe_clkpcie_1_pipe_clkP*3qfprom@7840002qcom,sdm845-qfpromqcom,qfpromx@ hstx-trim-primary@1eb*hstx-trim-secondary@1eb*rng@793000 2qcom,prng-eey03@coreopp-table-qup2operating-points-v2*<opp-500000004opp-75000000xh5opp-1000000006opp-128000000 7dma-controller@8000002qcom,sdm845-gpi-dma  ( Edisabled*=geniqup@8c00002qcom,geni-se-qup` m-ahbs-ahb3d3e ( 8 9 qup-core Edisabledi2c@8800002qcom,geni-i2c@se3Ddefault: Y ;<H8 998 qup-corequp-configqup-memory == txrx Edisabledspi@8800002qcom,geni-spi@se3Ddefault> Y 08 99qup-corequp-config == txrx Edisabledserial@8800002qcom,geni-uart@se3Ddefault? Y;<08 99qup-corequp-config Edisabledi2c@8840002qcom,geni-i2c@@se3Fdefault@ Z ;<H8 998 qup-corequp-configqup-memory == txrx Edisabledspi@8840002qcom,geni-spi@@se3FdefaultA Z 08 99qup-corequp-config == txrx Edisabledserial@8840002qcom,geni-uart@@se3FdefaultB Z;<08 99qup-corequp-config Edisabledi2c@8880002qcom,geni-i2c@se3HdefaultC [ ;<H8 998 qup-corequp-configqup-memory == txrx Edisabledspi@8880002qcom,geni-spi@se3HdefaultD [ 08 99qup-corequp-config == txrx Edisabledserial@8880002qcom,geni-uart@se3HdefaultE [;<08 99qup-corequp-config Edisabledi2c@88c0002qcom,geni-i2c@se3JdefaultF \ ;<H8 998 qup-corequp-configqup-memory == txrx Edisabledspi@88c0002qcom,geni-spi@se3JdefaultG \ 08 99qup-corequp-config == txrx Edisabledserial@88c0002qcom,geni-uart@se3JdefaultH \;<08 99qup-corequp-config Edisabledi2c@8900002qcom,geni-i2c@se3LdefaultI ] ;<H8 998 qup-corequp-configqup-memory == txrx Edisabledspi@8900002qcom,geni-spi@se3LdefaultJ ] 08 99qup-corequp-config == txrx Edisabledserial@8900002qcom,geni-uart@se3LdefaultK ];<08 99qup-corequp-config Edisabledi2c@8940002qcom,geni-i2c@@se3NdefaultL ^ ;<H8 998 qup-corequp-configqup-memory == txrx Edisabledspi@8940002qcom,geni-spi@@se3NdefaultM ^ 08 99qup-corequp-config == txrx Edisabledserial@8940002qcom,geni-uart@@se3NdefaultN ^;<08 99qup-corequp-config Edisabledi2c@8980002qcom,geni-i2c@se3PdefaultO _ ;<H8 998 qup-corequp-configqup-memory == txrx Edisabledspi@8980002qcom,geni-spi@se3PdefaultP _ 08 99qup-corequp-config == txrx Edisabledserial@8980002qcom,geni-uart@se3PdefaultQ _;<08 99qup-corequp-config Edisabledi2c@89c0002qcom,geni-i2c@se3RdefaultR ` ;< Edisabledspi@89c0002qcom,geni-spi@se3RdefaultS ` 08 99qup-corequp-config == txrx Edisabledserial@89c0002qcom,geni-uart@se3RdefaultT `;<08 99qup-corequp-config Edisableddma-controller@0xa000002qcom,sdm845-gpi-dma%&'()*+  ( Edisabled*Wgeniqup@ac00002qcom,geni-se-qup` m-ahbs-ahb3f3g ( U 9 qup-core Edisabledi2c@a800002qcom,geni-i2c@se3TdefaultV a ;<HU 99U qup-corequp-configqup-memory WW txrx Edisabledspi@a800002qcom,geni-spi@se3TdefaultX a 0U 99qup-corequp-config WW txrx Edisabledserial@a800002qcom,geni-uart@se3TdefaultY a;<0U 99qup-corequp-config Edisabledi2c@a840002qcom,geni-i2c@@se3VdefaultZ b ;<HU 99U qup-corequp-configqup-memory WW txrx Edisabledspi@a840002qcom,geni-spi@@se3Vdefault[ b 0U 99qup-corequp-config WW txrx Edisabledserial@a840002qcom,geni-debug-uart@@se3Vdefault\ b;<0U 99qup-corequp-config Edisabledi2c@a880002qcom,geni-i2c@se3Xdefault] c ;<HU 99U qup-corequp-configqup-memory WW txrx Edisabledspi@a880002qcom,geni-spi@se3Xdefault^ c 0U 99qup-corequp-config WW txrx Edisabledserial@a880002qcom,geni-uart@se3Xdefault_ c;<0U 99qup-corequp-config Edisabledi2c@a8c0002qcom,geni-i2c@se3Zdefault` d ;<HU 99U qup-corequp-configqup-memory WW txrx Edisabledspi@a8c0002qcom,geni-spi@se3Zdefaulta d 0U 99qup-corequp-config WW txrx Edisabledserial@a8c0002qcom,geni-uart@se3Zdefaultb d;<0U 99qup-corequp-config Edisabledi2c@a900002qcom,geni-i2c@se3\defaultc e ;<HU 99U qup-corequp-configqup-memory WW txrx Edisabledspi@a900002qcom,geni-spi@se3\defaultd e 0U 99qup-corequp-config WW txrx Edisabledserial@a900002qcom,geni-uart@se3\defaulte e;<0U 99qup-corequp-config Edisabledi2c@a940002qcom,geni-i2c@@se3^defaultf f ;<HU 99U qup-corequp-configqup-memory WW txrx Edisabledspi@a940002qcom,geni-spi@@se3^defaultg f 0U 99qup-corequp-config WW txrx Edisabledserial@a940002qcom,geni-uart@@se3^defaulth f;<0U 99qup-corequp-config Edisabledi2c@a980002qcom,geni-i2c@se3`defaulti g ;<HU 99U qup-corequp-configqup-memory WW txrx Edisabledspi@a980002qcom,geni-spi@se3`defaultj g 0U 99qup-corequp-config WW txrx Edisabledserial@a980002qcom,geni-uart@se3`defaultk g;<0U 99qup-corequp-config Edisabledi2c@a9c0002qcom,geni-i2c@se3bdefaultl h ;< EdisabledHU 99U qup-corequp-configqup-memory WW txrxspi@a9c0002qcom,geni-spi@se3bdefaultm h 0U 99qup-corequp-config WW txrx Edisabledserial@a9c0002qcom,geni-uart@se3bdefaultn h;<0U 99qup-corequp-config Edisabledsystem-cache-controller@11000002qcom,sdm845-llcc 0llcc_basellcc_broadcast_base Fpmu@114a0002qcom,sdm845-llcc-bwmon D oopp-table2operating-points-v2*oopp-0 5opp-1opp-2.opp-3Ropp-4npmu@1436400%2qcom,sdm845-bwmonqcom,msm8998-bwmonCd E popp-table2operating-points-v2*popp-0I>opp-1opp-2opp-3>opp-4pci@1c000002qcom,pcie-sdm845@ `` `parfdbielbiconfigpci 1; 8` ` `0`0 msi?EX83.3)3+3-3/3030pipeauxcfgbus_masterbus_slaveslave_q2atbu (f((((((((( ( ( ( ( (((p3wpci31pciephy Edisabledphy@1c060002qcom,sdm845-qmp-pcie-phy`  393+3,3:auxcfg_ahbrefrefgenp3wphy3: Edisabledphy@1c06200@b(dhfp3.pipe0pcie_0_pipe_clk*1pci@1c080002qcom,pcie-sdm845@ @@ @parfdbielbiconfigpci 1; 8@ @ @0@0 3msi?EX@3631333537383434pipeauxcfgbus_masterbus_slaveslave_q2areftbu31$ (f((((((((( (  (  (  (  ( ((p3wpci32pciephy Edisabledphy@1c0a0002qcom,sdm845-qhp-pcie-phy  3933343:auxcfg_ahbrefrefgenp3wphy3: Edisabledphy@1c06200036pipe0pcie_1_pipe_clk*2interconnect@13800002qcom,sdm845-mem-noc8rq*interconnect@14e00002qcom,sdm845-dc-nocNqinterconnect@15000002qcom,sdm845-config-nocPPq*9interconnect@16200002qcom,sdm845-system-nocbq*zinterconnect@16e00002qcom,sdm845-aggre1-nocnPq*8interconnect@17000002qcom,sdm845-aggre2-nocpq*Uinterconnect@17400002qcom,sdm845-mmss-noctq*ufshc@1d84000+2qcom,sdm845-ufshcqcom,ufshcjedec,ufs-2.0 @%stdice  rufsphy3p3wrst ({core_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clkice_core_clkH3333#3333H <4`рEokay st '*uphy@1d870002qcom,sdm845-qmp-ufs-phyp  refref_aux33puwufsphyEokay0v@wphy@1d87400Ptv|xz*rdma-controller@1dc40002qcom,bam-v1.7.0@@ #bam_clkPX0((((*xcrypto@1dfa0002qcom,crypto-v5.4ߠ`3 3 #ifacebuscorexx rxtx0((((ipa@1e400002qcom,sdm845-ipa( ("0pp @ipa-regipa-sharedgsi87yy(ipagsiipa-clock-queryipa-setup-ready# coreHUUz 9memoryimemconfig{{*/ipa-clock-enabled-validipa-clock-enabledEokayqhwlock@1f400002qcom,tcsr-mutex|*syscon@1f600002qcom,sdm845-tcsrsyscon*pinctrl@34000002qcom,sdm845-pinctrl@ *?s|Q*scci0-defaultgpio17gpio18cci_i2c*cci0-sleepgpio17gpio18cci_i2c*cci1-defaultgpio19gpio20cci_i2c*cci1-sleepgpio19gpio20cci_i2c*qspi-clkpinmuxgpio95 qspi_clkqspi-cs0pinmuxgpio90qspi_csqspi-cs1pinmuxgpio89qspi_csqspi-data01pinmux-datagpio91gpio92 qspi_dataqspi-data12pinmux-datagpio93gpio94 qspi_dataqup-i2c0-default*:pinmux gpio0gpio1qup0qup-i2c1-default*@pinmuxgpio17gpio18qup1qup-i2c2-default*Cpinmuxgpio27gpio28qup2qup-i2c3-default*Fpinmuxgpio41gpio42qup3qup-i2c4-default*Ipinmuxgpio89gpio90qup4qup-i2c5-default*Lpinmuxgpio85gpio86qup5qup-i2c6-default*Opinmuxgpio45gpio46qup6qup-i2c7-default*Rpinmuxgpio93gpio94qup7qup-i2c8-default*Vpinmuxgpio65gpio66qup8qup-i2c9-default*Zpinmux gpio6gpio7qup9qup-i2c10-default*]pinmuxgpio55gpio56qup10qup-i2c11-default*`pinmuxgpio31gpio32qup11qup-i2c12-default*cpinmuxgpio49gpio50qup12qup-i2c13-default*fpinmuxgpio105gpio106qup13qup-i2c14-default*ipinmuxgpio33gpio34qup14qup-i2c15-default*lpinmuxgpio81gpio82qup15qup-spi0-default*>pinmuxgpio0gpio1gpio2gpio3qup0configgpio0gpio1gpio2gpio3qup-spi1-default*Apinmuxgpio17gpio18gpio19gpio20qup1qup-spi2-default*Dpinmuxgpio27gpio28gpio29gpio30qup2qup-spi3-default*Gpinmuxgpio41gpio42gpio43gpio44qup3qup-spi4-default*Jpinmuxgpio89gpio90gpio91gpio92qup4qup-spi5-default*Mpinmuxgpio85gpio86gpio87gpio88qup5qup-spi6-default*Ppinmuxgpio45gpio46gpio47gpio48qup6qup-spi7-default*Spinmuxgpio93gpio94gpio95gpio96qup7qup-spi8-default*Xpinmuxgpio65gpio66gpio67gpio68qup8qup-spi9-default*[pinmuxgpio6gpio7gpio4gpio5qup9qup-spi10-default*^pinmuxgpio55gpio56gpio53gpio54qup10qup-spi11-default*apinmuxgpio31gpio32gpio33gpio34qup11qup-spi12-default*dpinmuxgpio49gpio50gpio51gpio52qup12qup-spi13-default*gpinmux gpio105gpio106gpio107gpio108qup13qup-spi14-default*jpinmuxgpio33gpio34gpio31gpio32qup14qup-spi15-default*mpinmuxgpio81gpio82gpio83gpio84qup15qup-uart0-default*?pinmux gpio2gpio3qup0qup-uart1-default*Bpinmuxgpio19gpio20qup1qup-uart2-default*Epinmuxgpio29gpio30qup2qup-uart3-default*Hpinmuxgpio43gpio44qup3qup-uart4-default*Kpinmuxgpio91gpio92qup4qup-uart5-default*Npinmuxgpio87gpio88qup5qup-uart6-default*Qpinmuxgpio47gpio48qup6qup-uart7-default*Tpinmuxgpio95gpio96qup7qup-uart8-default*Ypinmuxgpio67gpio68qup8qup-uart9-default*\pinmux gpio4gpio5qup9qup-uart10-default*_pinmuxgpio53gpio54qup10qup-uart11-default*bpinmuxgpio33gpio34qup11qup-uart12-default*epinmuxgpio51gpio52qup12qup-uart13-default*hpinmuxgpio107gpio108qup13qup-uart14-default*kpinmuxgpio31gpio32qup14qup-uart15-default*npinmuxgpio83gpio84qup15quat_mi2s_sleepmuxgpio58gpio59gpioconfiggpio58gpio59quat_mi2s_activemuxgpio58gpio59 qua_mi2sconfiggpio58gpio59(quat_mi2s_sd0_sleepmuxgpio60gpioconfiggpio60quat_mi2s_sd0_activemuxgpio60 qua_mi2sconfiggpio60quat_mi2s_sd1_sleepmuxgpio61gpioconfiggpio61quat_mi2s_sd1_activemuxgpio61 qua_mi2sconfiggpio61quat_mi2s_sd2_sleepmuxgpio62gpioconfiggpio62quat_mi2s_sd2_activemuxgpio62 qua_mi2sconfiggpio62quat_mi2s_sd3_sleepmuxgpio63gpioconfiggpio63quat_mi2s_sd3_activemuxgpio63 qua_mi2sconfiggpio63sdc2-clk*pinconf sdc2_clksdc2-cmd*pinconf sdc2_cmdsdc2-data*pinconf sdc2_datasd-card-det-n*pinmuxgpio126gpiopinconfgpio126remoteproc@40800002qcom,sdm845-mss-pil H qdsp6rmbL }}}}}0wdogfatalreadyhandoverstop-ackshutdown-ack@3$3'33%3(3&3@#2ifacebusmemgpll0_msssnoc_aximnoc_axiprngxo%~/stopp wmss_restartpdc_reset40P@;;; cxmxmssEokay6Lqcom/sdm845/judyp/mba.mbnqcom/sdm845/judyp/modem.mbnmbampssglink-edge Zmodem`p' clock-controller@50900002qcom,sdm845-gpucc P#33 8bi_tcxogcc_gpu_gpll0_clk_srcgcc_gpu_gpll0_div_clk_src*stm@6002000 2arm,coresight-stmarm,primecell  (stm-basestm-stimulus-base% apb_pclkout-portsportendpointC*funnel@6041000+2arm,coresight-dynamic-funnelarm,primecell% apb_pclkout-portsportendpointC*in-ports port@7endpointC*funnel@6043000+2arm,coresight-dynamic-funnelarm,primecell0% apb_pclkout-portsportendpointC*in-ports port@5endpointC*funnel@6045000+2arm,coresight-dynamic-funnelarm,primecellP% apb_pclkout-portsportendpointC*in-ports port@0endpointC*port@2endpointC*replicator@6046000/2arm,coresight-dynamic-replicatorarm,primecell`% apb_pclkout-portsportendpointC*in-portsportendpointC*etf@6047000 2arm,coresight-tmcarm,primecellp% apb_pclkout-portsportendpointC*in-ports port@1endpointC*etr@6048000 2arm,coresight-tmcarm,primecell% apb_pclkSin-portsportendpointC*etm@7040000"2arm,coresight-etm4xarm,primecell% apb_pclkfout-portsportendpointC*etm@7140000"2arm,coresight-etm4xarm,primecell% apb_pclkfout-portsportendpointC*etm@7240000"2arm,coresight-etm4xarm,primecell$% apb_pclkfout-portsportendpointC*etm@7340000"2arm,coresight-etm4xarm,primecell4% apb_pclkfout-portsportendpointC*etm@7440000"2arm,coresight-etm4xarm,primecellD% apb_pclkfout-portsportendpointC*etm@7540000"2arm,coresight-etm4xarm,primecellT% apb_pclkfout-portsportendpointC*etm@7640000"2arm,coresight-etm4xarm,primecelld % apb_pclkfout-portsportendpointC*etm@7740000"2arm,coresight-etm4xarm,primecellt!% apb_pclkfout-portsportendpointC*funnel@7800000+2arm,coresight-dynamic-funnelarm,primecell% apb_pclkout-portsportendpointC*in-ports port@0endpointC*port@1endpointC*port@2endpointC*port@3endpointC*port@4endpointC*port@5endpointC*port@6endpointC*port@7endpointC*funnel@7810000+2arm,coresight-dynamic-funnelarm,primecell% apb_pclkout-portsportendpointC*in-portsportendpointC*mmc@8804000$2qcom,sdm845-sdhciqcom,sdhci-msm-v5@hc_irqpwr_irq3h3i#ifacecorexo (;Eokay s~defaultopp-table2operating-points-v2*opp-9600000|4opp-19200000$5opp-1000000006opp-201500000 `opp-table-qspi2operating-points-v2*opp-19200000$4opp-1000000005opp-150000000р6opp-3000000007spi@88df0002qcom,sdm845-qspiqcom,qspi-v1  R33 ifacecore; Edisabledslim@171c00002qcom,slim-ngd-v2.1.0 xpEokay  rxtxtx2rx2 ( ngd@1 ifd@0 2slim217,250*codec@1 2slim217,250 s6*?|mclkw@w@w@ w@ *gpio-controller@422qcom,wcd9340-gpioBswm@c852qcom,soundwire-v1.3.0 @8HW??p   iface lmh@17d708002qcom,sdm845-lmh !q$s*?*lmh@17d788002qcom,sdm845-lmh׈  q$s*?*soundphy@88e2000(2qcom,sdm845-qusb2-phyqcom,qusb2-v2-phy Eokay3# cfg_ahbrefp3 v@  % ? T k*phy@88e3000(2qcom,sdm845-qusb2-phyqcom,qusb2-v2-phy0 Edisabled3# cfg_ahbrefp3 *phy@88e90002qcom,sdm845-qmp-usb3-phy Eokay  3333auxcfg_ahbrefcom_auxp33 wphycommon0w@vphy@88e9200`((3pipe0usb3_phy_pipe_clk_src*phy@88eb0002qcom,sdm845-qmp-usb3-uni-phy Edisabled  3333auxcfg_ahbrefcom_auxp33 wphycommonphy@88eb200@(p3pipe0usb3_uni_phy_pipe_clk_src*usb@a6f88002qcom,sdm845-dwc3qcom,dwc3 oEokay w(3 3333#cfg_noccoreifacesleepmock_utmi33$р02hs_phy_irqss_phy_irqdm_hs_phy_irqdp_hs_phy_irq3p30U9)usb-ddrapps-usbusb@a600000 2snps,dwc3 `  (@  usb2-phyusb3-phy peripheralusb@a8f88002qcom,sdm845-dwc3qcom,dwc3  Edisabled w(3 3333#cfg_noccoreifacesleepmock_utmi33$р02hs_phy_irqss_phy_irqdm_hs_phy_irqdp_hs_phy_irq3p30U9*usb-ddrapps-usbusb@a800000 2snps,dwc3   (`  usb2-phyusb3-phyvideo-codec@aa000002qcom,sdm845-venus-v2   ;venusvcodec0vcodec1cx8  Acoreifacebusvcodec0_corevcodec0_busvcodec1_corevcodec1_bus((09+video-memcpu-cfg Edisabledvideo-core02venus-decodervideo-core12venus-encoderopp-table2operating-points-v2*opp-1000000004opp-200000000 5opp-3200000006opp-380000000Wopp-444000000v7opp-533000097clock-controller@ab000002qcom,sdm845-videocc #bi_tcxoP*camss@a000002qcom,sdm845-camss 0 ˠ ̀ P ` p ƀ @ `@ @@Ecsid0csid1csid2csiphy0csiphy1csiphy2csiphy3vfe0vfe1vfe_litexEcsid0csid1csid2csiphy0csiphy1csiphy2csiphy3vfe0vfe1vfe_lite  %&,-23  33RS!"$#()+*/10camnoc_axicpas_ahbcphy_rx_srccsi0csi0_srccsi1csi1_srccsi2csi2_srccsiphy0csiphy0_timercsiphy0_timer_srccsiphy1csiphy1_timercsiphy1_timer_srccsiphy2csiphy2_timercsiphy2_timer_srccsiphy3csiphy3_timercsiphy3_timer_srcgcc_camera_ahbgcc_camera_axislow_ahb_srcsoc_ahbvfe0_axivfe0vfe0_cphy_rxvfe0_srcvfe1_axivfe1vfe1_cphy_rxvfe1_srcvfe_litevfe_lite_cphy_rxvfe_lite_src0((( (  Edisabledports cci@ac4a0002qcom,sdm845-cci  Ġ@ 0SR 5camnoc_axisoc_ahbslow_ahb_srccpas_ahbccicci_srcĴ<4`defaultsleep  Edisabledi2c-bus@0B@ i2c-bus@1B@ clock-controller@ad000002qcom,sdm845-camcc P#bi_tcxo*opp-table-dsi2operating-points-v2*opp-19200000$4opp-180000000 5opp-275000000d*6opp-328580000opp-358000000V7mdss@ae000002qcom,sdm845-mdss mdss  ifacecore S*?0mdp0-memmdp1-mem((  Edisabled *display-controller@ae010002qcom,sdm845-dpu   mdpvbif(3 gcc-busifacebuscorevsync$;ports port@0endpointC*port@1endpointC*opp-table2operating-points-v2*opp-19200000$4opp-171428571 75opp-344000000opp-430000000G7dsi@ae940002qcom,mdss-dsi-ctrl @ dsi_ctrl0$bytebyte_intfpixelcoreifacebus ;dsi Edisabled ports port@0endpointC*port@1endpointdsi-phy@ae944002qcom,dsi-phy-10nm0 D F Jdsi_phydsi_phy_lanedsi_pll# ifaceref Edisabled*dsi@ae960002qcom,mdss-dsi-ctrl ` dsi_ctrl0 $bytebyte_intfpixelcoreifacebus ;dsi Edisabled ports port@0endpointC*port@1endpointdsi-phy@ae964002qcom,dsi-phy-10nm0 d f jdsi_phydsi_phy_lanedsi_pll# ifaceref Edisabled*gpu@50000002qcom,adreno-630.2qcom,adreno  kgsl_3d0_reg_memorycx_mem , gfx-memEokayopp-table2operating-points-v2*opp-710000000*Q nopp-675000000(; nopp-596000000#= @^opp-520000000 ^opp-414000000# >opp-342000000b )opp-257000000Q@ @%zap-shaderLqcom/sdm845/judyp/a630_zap.mbniommu@504000022qcom,sdm845-smmu-v2qcom,adreno-smmuqcom,smmu-v2  xlmnopqrs3!3 busiface*gmu@506a000&2qcom,adreno-gmu-630.2qcom,adreno-gmu0 ( Hgmugmu_pdcgmu_pdc_seq01hfigmu 33!gmucxoaximemnoccxgx Edisabled*opp-table2operating-points-v2*opp-400000000ׄ opp-200000000  0clock-controller@af000002qcom,sdm845-dispcc @#33bi_tcxogcc_disp_gpll0_clk_srcgcc_disp_gpll0_div_clk_srcdsi0_phy_pll_out_byteclkdsi0_phy_pll_out_dsiclkdsi1_phy_pll_out_byteclkdsi1_phy_pll_out_dsiclkdp_link_clk_divsel_tendp_vco_divided_clk_src_muxP Edisabled*interrupt-controller@b2200002qcom,sdm845-pdcqcom,pdc "$ ^^asv?**|reset-controller@b2e00002qcom,sdm845-pdc-global .*thermal-sensor@c263000 2qcom,sdm845-tsensqcom,tsens-v2 &0 "   uplowcritical -*thermal-sensor@c265000 2qcom,sdm845-tsensqcom,tsens-v2 &P "0 uplowcritical -*reset-controller@c2a00002qcom,sdm845-aoss-cc **power-controller@c300000#2qcom,sdm845-aoss-qmpqcom,aoss-qmp 0 p'*%cxebisram@c3f00002qcom,sdm845-rpmh-stats ?spmi@c4400002qcom,spmi-pmic-arbP D ``p @`corechnlsobsrvrintrcnfg periph_irq P C *? Ppmic@02qcom,pm8998qcom,spmi-pmic pon@8002qcom,pm8998-pon [ kpwrkey2qcom,pm8941-pwrkey y=  tresin2qcom,pm8941-resin y=  rtemp-alarm@24002qcom,spmi-temp-alarm$$  thermal -*coincell@28002qcom,pm8941-coincell( Edisabledadc@31002qcom,spmi-adc-rev211  *adc-chan@6 Zdie_tempadc-tm@34002qcom,spmi-adc-tm-hc44 -  Edisabledrtc@60002qcom,pm8941-rtc`a rtcalarmagpios@c000 2qcom,pm8998-gpioqcom,spmi-gpio*?*vol-up-active-pinsgpio6normal *pmic@12qcom,pm8998qcom,spmi-pmic pmic@22qcom,pmi8998qcom,spmi-pmic gpios@c000!2qcom,pmi8998-gpioqcom,spmi-gpio*?*pmic@32qcom,pmi8998qcom,spmi-pmic labibb2qcom,pmi8998-lab-ibbibb  sc-errocplab  sc-errocppwm2qcom,pmi8998-lpg   Edisabledleds@d8002qcom,pmi8998-wled  ovpshort Zbacklight Edisabledsram@146bf000#2qcom,sdm845-imemsysconsimple-mfdk kpil-reloc@94c2qcom,pil-reloc-info Liommu@15000000!2qcom,sdm845-smmu-500arm,mmu-500   A`abcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVW*(clock-controller@170140002qcom,sdm845-lpasscc @0 ccqdsp6ss Edisabledinterconnect@179000002qcom,sdm845-gladiator-nocЀq*watchdog@17980000#2qcom,apss-wdt-sdm845qcom,kpss-wdt0 mailbox@179900002qcom,sdm845-apss-shared *'rsc@179c0000 Zapps_rsc2qcom,rpmh-rsc0drv-0drv-1drv-2$   bcm-voter2qcom,bcm-voter*qclock-controller2qcom,sdm845-rpmh-clkxo*#power-controller2qcom,sdm845-rpmhpdP*;opp-table2operating-points-v2*opp1 opp2 0*4opp3 @*5opp4 *6opp5 *opp6 *7opp7 @opp8 Popp9 *opp10 pm8998-rpmh-regulators2qcom,pm8998-rpmh-regulators a  . < J X f t           $ 2 L Z q     smps2  smps3 @ @*smps5    *smps7  *ldo1 m m *vldo2 O O  *ldo3 B@ B@ ldo5 5 5 ldo6 R R ldo7 w@ w@ ldo8 O   ldo9 @ , ldo10 @ , ldo11 B@  ldo12 w@ w@ *ldo13 w@ -* *ldo14 w@  ldo15 w@ w@ ldo17   ldo18 )B -* ldo20 )B -* *tldo21 )B -* *ldo22 * * ldo23 - 2 ldo24 / / *ldo25 - 2 ldo26 O O *wldo28 w@ w@ lvs1 w@ w@lvs2 w@ w@pmi8998-rpmh-regulators2qcom,pmi8998-rpmh-regulators b >bob 2 6  M*pm8005-rpmh-regulators2qcom,pm8005-rpmh-regulators c  . < Jsmps3 ' 'interrupt-controller@17a00000 2arm,gic-v3 ?*   *msi-controller@17a400002arm,gic-v3-its d s Edisableddma-controller@171840002qcom,bam-v1.7.0X@ ~ P  (*timer@17c90000  2arm,armv7-timer-memframe@17ca0000 frame@17cc0000   Edisabledframe@17cd0000    Edisabledframe@17ce0000    Edisabledframe@17cf0000    Edisabledframe@17d00000    Edisabledframe@17d10000    Edisabledinterconnect@17d410002qcom,sdm845-osm-l3#3 xoalternate*cpufreq@17d430002qcom,cpufreq-hw 0Xfreq-domain0freq-domain1#3 xoalternate *wifi@188000002qcom,wcn3990-wifi Edisabledmembasecxo_ref_clk_pin# (@thermal-zonescpu0-thermal   tripstrip-point0 _ passivetrip-point1 s passivecpu_crit   criticalcpu1-thermal   tripstrip-point0 _ passivetrip-point1 s passivecpu_crit   criticalcpu2-thermal   tripstrip-point0 _ passivetrip-point1 s passivecpu_crit   criticalcpu3-thermal   tripstrip-point0 _ passivetrip-point1 s passivecpu_crit   criticalcpu4-thermal   tripstrip-point0 _ passivetrip-point1 s passivecpu_crit   criticalcpu5-thermal   tripstrip-point0 _ passivetrip-point1 s passivecpu_crit   criticalcpu6-thermal   tripstrip-point0 _ passivetrip-point1 s passivecpu_crit   criticalcpu7-thermal   tripstrip-point0 _ passivetrip-point1 s passivecpu_crit   criticalaoss0-thermal   tripstrip-point0 _ hotcluster0-thermal   tripstrip-point0 _ hotcluster0_crit   criticalcluster1-thermal   tripstrip-point0 _ hotcluster1_crit   criticalgpu-top-thermal   tripstrip-point0 _ hotgpu-bottom-thermal   tripstrip-point0 _ hotaoss1-thermal   tripstrip-point0 _ hotq6-modem-thermal   tripstrip-point0 _ hotmem-thermal   tripstrip-point0 _ hotwlan-thermal   tripstrip-point0 _ hotq6-hvx-thermal   tripstrip-point0 _ hotcamera-thermal   tripstrip-point0 _ hotvideo-thermal   tripstrip-point0 _ hotmodem-thermal   tripstrip-point0 _ hotpm8998-thermal   tripspm8998-alert0 ( passivepm8998-crit H  criticalgpio-keys 2gpio-keysdefault ZGPIO Buttonskey-vol-up ZVolume up s vph-pwr-regulator2regulator-fixedvph_pwr 8u  8u *pm8998-smps4-regulator2regulator-fixed vreg_s4a_1p8 w@ w@ *$* interrupt-parent#address-cells#size-cellsmodelcompatiblei2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9i2c10i2c11i2c12i2c13i2c14i2c15spi0spi1spi2spi3spi4spi5spi6spi7spi8spi9spi10spi11spi12spi13spi14spi15rangesregwidthheightstrideformatdevice_typeno-maphwlocksphandleqcom,client-idqcom,vmidenable-methodcapacity-dmips-mhzdynamic-power-coefficientqcom,freq-domainoperating-points-v2interconnectspower-domainspower-domain-names#cooling-cellsnext-level-cachecpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzopp-peak-kBpsinterrupts#clock-cellsclock-frequencyclock-output-namesinterrupts-extendedinterrupt-namesclocksclock-namesmemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-namesstatusfirmware-namelabelqcom,remote-pidmboxesqcom,glink-channelsqcom,domainqcom,intentsqcom,protection-domain#sound-dai-cellsiommusqcom,non-secure-domainqcom,smemqcom,local-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cells#power-domain-cellsdomain-idle-statesdma-ranges#reset-cellsprotected-clocksbitsrequired-opps#dma-cellsdma-channelsdma-channel-maskinterconnect-namespinctrl-namespinctrl-0dmasdma-namesreg-nameslinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapiommu-mapresetsreset-namesphysphy-namesassigned-clocksassigned-clock-rates#phy-cells#interconnect-cellsqcom,bcm-voterslanes-per-directionfreq-table-hzreset-gpiosvcc-supplyvcc-max-microampvdda-phy-supplyvdda-pll-supplyqcom,eeqcom,controlled-remotelymodem-init#hwlock-cellsgpio-controller#gpio-cellsgpio-rangeswakeup-parentgpio-reserved-rangespinsfunctionbias-pull-updrive-strengthbias-pull-downbias-disableinput-enableoutput-highqcom,halt-regsremote-endpointarm,scatter-gatherarm,coresight-loses-context-with-cpucd-gpiosvmmc-supplyvqmmc-supplyqcom,apps-ch-pipesqcom,ea-pcslim-ifc-devqcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,dout-portsqcom,din-portsqcom,ports-sinterval-lowqcom,ports-offset1qcom,ports-offset2cpusqcom,lmh-temp-arm-millicelsiusqcom,lmh-temp-low-millicelsiusqcom,lmh-temp-high-millicelsiusnvmem-cellsvdd-supplyvdda-phy-dpdm-supplyqcom,imp-res-offset-valueqcom,hstx-trim-valueqcom,preemphasis-levelqcom,preemphasis-widthsnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirkdr_modepinctrl-1assigned-clock-parentsqcom,gmuopp-level#iommu-cells#global-interruptsqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,channelcell-indexmode-bootloadermode-recoverydebouncelinux,codeio-channelsio-channel-names#io-channel-cellsqcom,drive-strength#pwm-cells#mbox-cellsqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s6-supplyvdd-s7-supplyvdd-s8-supplyvdd-s9-supplyvdd-s10-supplyvdd-s11-supplyvdd-s12-supplyvdd-s13-supplyvdd-l1-l27-supplyvdd-l2-l8-l17-supplyvdd-l3-l11-supplyvdd-l4-l5-supplyvdd-l6-supplyvdd-l7-l12-l14-l15-supplyvdd-l9-supplyvdd-l10-l23-l25-supplyvdd-l13-l19-l21-supplyvdd-l16-l28-supplyvdd-l18-l22-supplyvdd-l20-l24-supplyvdd-l26-supplyvin-lvs-1-2-supplyregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-always-onvdd-bob-supplyregulator-allow-bypassmsi-controller#msi-cellsnum-channelsqcom,num-eesframe-number#freq-domain-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisregulator-nameregulator-boot-onvin-supply