B8<( hugsun,x99rockchip,rk3399 +7Hugsun X99 TV BOXaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/mmc@fe310000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid  4 ?cpu@1cpuarm,cortex-a53pscid  4 ?cpu@2cpuarm,cortex-a53pscid  4 ?cpu@3cpuarm,cortex-a53pscid  4 ?cpu@100cpuarm,cortex-a72psci   4?thermal-idleG'Scpu@101cpuarm,cortex-a72psci   4?thermal-idleG'Sidle-statescpscicpu-sleeparm,idle-statepxS? cluster-sleeparm,idle-statepS? display-subsystemrockchip,display-subsystemmemory-controllerrockchip,rk3399-dmcdmc_clk disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6!xin24m4?pcie@f8000000rockchip,rk3399-pcie Aaxi-baseapb-basepci+K\h Gaclkaclk-perfhclkpm0123rsyslegacyclient` ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38ɂ8(coremgmtmgmt-stickypipepmpclkaclk disabledinterrupt-controllerK?ethernet@fe300000rockchip,rk3399-gmac0 rmacirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac stmmacethokay.EinputR]rgmiifdefaultt ~ 'P(mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р Mbiuciuciu-driveciu-sampleyresetokay "-fdefault t !;+wifi@1brcm,bcm4329-fmac " rhost-wakefdefaultt#mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@AрI  Lbiuciuciu-driveciu-samplezresetokayр^p{$fdefaultt%&'( mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 NI Nclk_xinclk_ahb!emmc_cardclock4) phy_arasanokay- ?usb@fe380000 generic-ehci8*+usbokayusb@fe3a0000 generic-ohci:*+usbokayusb@fe3c0000 generic-ehci<,-usbokayusb@fe3e0000 generic-ohci> ,-usbokaydebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3irefbus_earlysuspendhost./usb2-phyusb3-phy utmi_wide4Mnokayusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otgokayusb@fe900000 snps,dwc3nrefbus_earlysuspendhost01usb2-phyusb3-phy utmi_wide4Mnokaydp@fec00000rockchip,rk3399-cdn-dp rI  ruocore-clkpclkspdifgrf23 HJspdifdptxapbcore disabledportsport+endpoint@04?endpoint@15?interrupt-controller@fee00000 arm,gic-v3K+P  ?interrupt-controller@fee20000arm,gic-v3-its?ppi-partitionsinterrupt-partition-0?interrupt-partition-1?saradc@ff100000rockchip,rk3399-saradc>Pesaradcapb_pclk saradc-apbokay6i2c@ff110000rockchip,rk3399-i2cAI AU i2cpclk;fdefaultt7+okay, i2c@ff120000rockchip,rk3399-i2cBI BV i2cpclk#fdefaultt8+ disabledi2c@ff130000rockchip,rk3399-i2cCI CW i2cpclk"fdefaultt9+okay ?i2c@ff140000rockchip,rk3399-i2cDI DX i2cpclk&fdefaultt:+ disabledi2c@ff150000rockchip,rk3399-i2cEI EY i2cpclk%fdefaultt;+ disabledi2c@ff160000rockchip,rk3399-i2cFI FZ i2cpclk$fdefaultt<+okayserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkc!+fdefault t=>?okaybluetoothbrcm,bcm43438-bt@ ext_clock 8A L" ^" m= fdefault tBCDwEFserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkb!+fdefaulttG disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkd!+fdefaulttHokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclke!+fdefaulttI disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDJ J txrxfdefaulttKLMN+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5J J txrxfdefaulttOPQR+okayflash@0jedec,spi-nor+spi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4JJtxrxfdefaulttSTUV+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCJJtxrxfdefaulttWXYZ+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclk[[ txrxfdefaultt\]^_+ disabledthermal-zonescpu-thermald`tripscpu_alert0ppassive?acpu_alert1$passive?bcpu_crits criticalcooling-mapsmap0amap1bHgpu-thermald`tripsgpu_alert0$passive?cgpu_crits criticalcooling-mapsmap0c dtsadc@ff260000rockchip,rk3399-tsadc&aOI qOdtsadcapb_pclk tsadc-apbfinitdefaultsleepte'f1e;okayQh?`qos@ffa58000rockchip,rk3399-qossyscon ?nqos@ffa5c000rockchip,rk3399-qossyscon ?oqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon ?rqos@ffa70080rockchip,rk3399-qossyscon ?sqos@ffa74000rockchip,rk3399-qossyscon@ ?pqos@ffa76000rockchip,rk3399-qossyscon` ?qqos@ffa90000rockchip,rk3399-qossyscon ?tqos@ffa98000rockchip,rk3399-qossyscon ?gqos@ffaa0000rockchip,rk3399-qossyscon ?uqos@ffaa0080rockchip,rk3399-qossyscon ?vqos@ffaa8000rockchip,rk3399-qossyscon ?wqos@ffaa8080rockchip,rk3399-qossyscon ?xqos@ffab0000rockchip,rk3399-qossyscon ?hqos@ffab0080rockchip,rk3399-qossyscon ?iqos@ffab8000rockchip,rk3399-qossyscon ?jqos@ffac0000rockchip,rk3399-qossyscon ?kqos@ffac0080rockchip,rk3399-qossyscon ?lqos@ffac8000rockchip,rk3399-qossyscon ?yqos@ffac8080rockchip,rk3399-qossyscon ?zqos@ffad0000rockchip,rk3399-qossyscon ?{qos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon ?mpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+?power-domain@34"gpower-domain@33!hipower-domain@31jpower-domain@32 klpower-domain@35#mpower-domain@25lpower-domain@23npower-domain@22fopower-domain@27Lppower-domain@28qpower-domain@8~}power-domain@9 power-domain@24rspower-domain@15+power-domain@21rtpower-domain@19uvpower-domain@20wxpower-domain@16+power-domain@17yzpower-domain@18{syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2?io-domains&rockchip,rk3399-pmu-io-voltage-domainokayFspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5||spiclkapb_pclk<fdefaultt}~+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7||"baudclkapb_pclkf!+fdefaultt disabledi2c@ff3c0000rockchip,rk3399-i2c<| I | | i2cpclk9fdefaultt+okay syr827@40silergy,syr827@ fan53555-regt vdd_cpu_b 4`3GY?regulator-state-memdsyr828@41silergy,syr828A fan53555-regtvdd_gpu 4`3GY}?regulator-state-memdpmic@1brockchip,rk808 fdefaultt4!xin32krtc_clko_wifi E  # 0 =EF?@regulatorsDCDC_REG1 vdd_center  q3Gregulator-state-memdDCDC_REG2 vdd_cpu_l qpq3G? regulator-state-memdDCDC_REG3vcc_ddr3Gregulator-state-mem JDCDC_REG4vcc_1v8w@w@3G?Fregulator-state-mem J bw@LDO_REG1 vcc1v8_dvpw@w@3Gregulator-state-mem J bw@LDO_REG2 vcca1v8_hdmiw@w@3Gregulator-state-mem J bw@LDO_REG3 vcca_1v8w@w@3Gregulator-state-mem J bw@LDO_REG4vcc_sdw@2Z3G?$regulator-state-mem J b2ZLDO_REG5 vcc3v0_sd--3Gregulator-state-mem J b-LDO_REG6vcc_1v5``3Gregulator-state-mem J b`LDO_REG7 vcca0v9_hdmi  3Gregulator-state-mem J b LDO_REG8vcc_3v0--3G?regulator-state-mem J b-SWITCH_REG1 vcc3v3_s33Gregulator-state-mem JSWITCH_REG2 vcc3v3_s03Gregulator-state-mem Ji2c@ff3d0000rockchip,rk3399-i2c=| I | | i2cpclk8fdefaultt+okayX (typec-portc@22 fcs,fusb302" fdefaultt ~okayi2c@ff3e0000rockchip,rk3399-i2c>| I | | i2cpclk:fdefaultt+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB fdefaultt| disabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB fdefaultt| disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  fdefaultt|okay?pwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 fdefaultt| disableddfi@ff630000c@rockchip,rk3399-dfiy pclk_ddr_mon disabled?video-codec@ff650000rockchip,rk3399-vpue rq rvepuvdpu aclkhclk iommu@ff650800rockchip,iommue@s aclkiface ?video-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccore  iommu@ff660480rockchip,iommu f@f@u aclkiface  ?iommu@ff670800rockchip,iommug@* aclkiface  disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@    apb_pclk?[dma-controller@ff6e0000arm,pl330arm,primecelln@    apb_pclk?Jclock-controller@ff750000rockchip,rk3399-pmucruuxin24m4 |I(J?|clock-controller@ff760000rockchip,rk3399-cruvxin24m4 @BCxDI#g/;рxh<4`#Fׄׄ ׄ?syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+?io-domains"rockchip,rk3399-io-voltage-domainokay 6 6  $mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrf  disabled?usb2phy@e450rockchip,rk3399-usb2phyP{phyclk4!clk_usbphy0_480mokay?*host-port  rlinestateokayR?+otg-port 0ghjrotg-bvalidotg-idlinestateokay?.usb2phy@e460rockchip,rk3399-usb2phy`|phyclk4!clk_usbphy1_480mokay?,host-port  rlinestateokayR?-otg-port 0lmorotg-bvalidotg-idlinestateokay?0phy@f780rockchip,rk3399-emmc-phy$emmcclk 2 okay?)pcie-phyrockchip,rk3399-pcie-phyrefclk phy disabled?phy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~ILuphyuphy-pipeuphy-tcphyokaydp-port ?2usb3-port ?/phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-refI Muphyuphy-pipeuphy-tcphyokaydp-port ?3usb3-port ?1watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifB[tx mclkhclkUfdefaulttokayi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s'[[txrxi2s_clki2s_hclkVfbclk_onbclk_offt'okay . Ii2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s([[txrxi2s_clki2s_hclkWfdefaulttokay . Ii2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)[[txrxi2s_clki2s_hclkXokay?vop@ff8f0000rockchip,rk3399-vop-lit wIׄaclk_vopdclk_vophclk_vop  axiahbdclk disabledport+?endpoint@0?endpoint@1?endpoint@2?endpoint@3?endpoint@4?5iommu@ff8f3f00rockchip,iommu?w aclkiface  disabled?vop@ff900000rockchip,rk3399-vop-big vIׄaclk_vopdclk_vophclk_vop  axiahbdclkokayport+?endpoint@0?endpoint@1?endpoint@2?endpoint@3?endpoint@4?4iommu@ff903f00rockchip,iommu?v aclkiface okay?isp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclk dphy disabledports+port@0+iommu@ff914000rockchip,iommu @P+ aclkiface  c?isp1@ff920000rockchip,rk3399-cif-isp@,oispaclkhclk dphy disabledports+port@0+iommu@ff924000rockchip,iommu @P, aclkiface  c?hdmi-soundsimple-audio-card ~i2s  hdmi-soundokaysimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmi(tqpoiahbisfrcecgrfref+okay fdefaultt?portsport+endpoint@0?endpoint@1?mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrfapb+ disabledports+port@0+endpoint@0?endpoint@1?mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrfapb+  disabled?ports+port@0+endpoint@0?endpoint@1?edp@ff970000rockchip,rk3399-edp jlo dppclkgrffdefaulttdp disabledports+port@0+endpoint@0?endpoint@1?gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 rjobmmugpu#okay  ?dpinctrlrockchip,rk3399-pinctrl+gpio@ff720000rockchip,gpio-bankr|  K?"gpio@ff730000rockchip,gpio-banks|  K?gpio@ff780000rockchip,gpio-bankxP  K?Agpio@ff788000rockchip,gpio-bankxQ  K?gpio@ff790000rockchip,gpio-bankyR  K?pcfg-pull-up ?pcfg-pull-down ?pcfg-pull-none "?pcfg-pull-none-12ma " / ?pcfg-pull-none-13ma " / ?pcfg-pull-none-18ma " /pcfg-pull-none-20ma " /pcfg-pull-up-2ma  /pcfg-pull-up-8ma  /pcfg-pull-up-18ma  /pcfg-pull-up-20ma  /pcfg-pull-down-4ma  /pcfg-pull-down-8ma  /pcfg-pull-down-12ma  / pcfg-pull-down-18ma  /pcfg-pull-down-20ma  /pcfg-output-high >pcfg-output-low J?pcfg-input-enable Upcfg-input-pull-up U pcfg-input-pull-down U clockclk-32k bcifcif-clkin b cif-clkouta b edpedp-hpd b?gmacrgmii-pins b    ?rmii-pins b     rgmii-sleep-pins bi2c0i2c0-xfer b?i2c1i2c1-xfer b?7i2c2i2c2-xfer b?8i2c3i2c3-xfer b?9i2c4i2c4-xfer b  ?i2c5i2c5-xfer b  ?:i2c6i2c6-xfer b  ?;i2c7i2c7-xfer b?<i2c8i2c8-xfer b?i2s0i2s0-2ch-bus` bi2s0-8ch-bus b?i2s0-8ch-bus-bclk-off b?i2s1i2s1-2ch-busP b?i2s1-2ch-bus-bclk-offP bsdio0sdio0-bus1 bsdio0-bus4@ b?sdio0-cmd b? sdio0-clk b?!sdio0-cd bsdio0-pwr bsdio0-bkpwr bsdio0-wp bsdio0-int bsdmmcsdmmc-bus1 bsdmmc-bus4@ b   ?(sdmmc-clk b ?%sdmmc-cmd b ?&sdmmc-cd b?'sdmmc-wp bsuspendap-pwroff bddrio-pwroff bspdifspdif-bus bspdif-bus-1 b?spi0spi0-clk b?Kspi0-cs0 b?Nspi0-cs1 bspi0-tx b?Lspi0-rx b?Mspi1spi1-clk b ?Ospi1-cs0 b ?Rspi1-rx b?Qspi1-tx b?Pspi2spi2-clk b ?Sspi2-cs0 b ?Vspi2-rx b ?Uspi2-tx b ?Tspi3spi3-clk b?}spi3-cs0 b?spi3-rx b?spi3-tx b?~spi4spi4-clk b?Wspi4-cs0 b?Zspi4-rx b?Yspi4-tx b?Xspi5spi5-clk b?\spi5-cs0 b?_spi5-rx b?^spi5-tx b?]testclktest-clkout0 btest-clkout1 btest-clkout2 btsadcotp-pin b?eotp-out b?fuart0uart0-xfer b?=uart0-cts b??uart0-rts b?>uart1uart1-xfer b  ?Guart2auart2a-xfer b uart2buart2b-xfer buart2cuart2c-xfer b?Huart3uart3-xfer b?Iuart3-cts buart3-rts buart4uart4-xfer b?uarthdcpuarthdcp-xfer bpwm0pwm0-pin b?pwm0-pin-pull-down bvop0-pwm-pin bvop1-pwm-pin bpwm1pwm1-pin b?pwm1-pin-pull-down bpwm2pwm2-pin bpwm2-pin-pull-down b?pwm3apwm3a-pin b?pwm3bpwm3b-pin bhdmihdmi-i2c-xfer bhdmi-cec b?pciepci-clkreqn-cpm bpci-clkreqnb-cpm bfusb30xfusb0-int b?irir-rx b?ledspower-led-pin b?pmicpmic-int-l b?vsel1-pin b?vsel2-pin b?sdiobt-host-wake-l b?Cbt-reg-on-h b ?Bbt-wake-l b?Dwifi-reg_on-h b ?wifiwifi-host-wake-l b?#usb-typecvcc5v0_typec_en b?usb2host-vbus-drv b?opp-table-0operating-points-v2 p? opp00 {Q  @opp01 {#F opp02 {0, P Popp03 {< HHopp04 {G B@B@opp05 {Tfr **opp-table-1operating-points-v2 p? opp00 {Q  @opp01 {#F opp02 {0, opp03 {< Y Yopp04 {G ~~opp05 {Tfr opp06 {_" opp07 {kI OOopp-table-2operating-points-v2?opp00 {  0opp01 {@ 0opp02 {ׄ 0opp03 {e Y Y0opp04 {#F HH0opp05 {/ 0chosen serial2:1500000n8external-gmac-clock fixed-clocksY@ !clkin_gmac4?dc-5vregulator-fixeddc_5v3GLK@LK@?ir-receivergpio-ir-receiver F"fdefaulttleds gpio-ledsfdefaulttled-0 blue:power F on default-onvcc-sysregulator-fixedvcc_sysLK@LK@3Y?vcc-phy-regulatorregulator-fixedvcc_phy3G?vcc1v8-s0regulator-fixed vcc1v8_s0w@w@3?6vcc3v3-sysregulator-fixed vcc3v3_sys2Z2Z3Y?Evcc5v0-host-regulatorregulator-fixed  fdefaultt vcc5v0_host3?vcc5v0-typec-regulatorregulator-fixed  fdefaultt vcc5v0_typec3Y?vcc5v0-usbregulator-fixed vcc5v0_usb3GLK@LK@Y?vdd-logpwm-regulator a vdd_log 5\3Gsdio-pwrseqmmc-pwrseq-simple@ ext_clockfdefaultt " ? compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllerpower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modepinctrl-namespinctrl-0snps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeeddisable-wpvqmmc-supplycard-detect-delayarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namesspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyregulator-compatibleregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayfcs,suspend-voltage-selectorregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendregulator-initial-moderockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-on-in-suspendregulator-suspend-microvoltvbus-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathlabeldefault-statelinux,default-triggerenable-active-highpwmspwm-supplyreset-gpios