k8T(  ),rockchip,rk3568-evb1-v10rockchip,rk3568$7Rockchip RK3568 EVB1 DDR4 V10 Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe2a0000/ethernet@fe010000/mmc@fe2b0000/mmc@fe310000cpus cpu@0cpu,arm,cortex-a55 !psci/CN cpu@100cpu,arm,cortex-a55!psci/CN cpu@200cpu,arm,cortex-a55!psci/CN cpu@300cpu,arm,cortex-a55!psci/CN opp-table-0,operating-points-v2VNopp-408000000aQ h 0v@opp-600000000a#F h 0opp-816000000a0, h 0opp-1104000000aAʹ h 0opp-1416000000aTfr h 0opp-1608000000a_" h0opp-1800000000akI h0opp-1992000000av h000display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc protocol@14Nopp-table-1,operating-points-v2NFopp-200000000a h opp-300000000ah opp-400000000aׄh opp-600000000a#Fh opp-700000000a)'h opp-800000000a/hB@hdmi-sound,simple-audio-cardHDMIi2sokaysimple-audio-card,codecsimple-audio-card,cpupmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0(smctimer,arm,armv8-timer0   0xin24m ,fixed-clockGn6Wxin24mNxin32k ,fixed-clockGWxin32kj tdefaultsram@10f000 ,mmio-sram sram@0,arm,scmi-shmemNsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@ satapmaliverxoob _ sata-phy disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob ` sata-phy disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@  ref_clksuspend_clkbus_clkotg utmi_wideokay usb2-phyusb3-phyusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@  ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wideokayinterrupt-controller@fd400000 ,arm,gic-v3 @F  "A,(7Nusb@fd800000 ,generic-ehci  usbokayusb@fd840000 ,generic-ohci  usbokayusb@fd880000 ,generic-ehci  usbokayusb@fd8c0000 ,generic-ohci  usbokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdNio-domains&,rockchip,rk3568-pmu-io-voltage-domainokayFTbp~syscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconNsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdNsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconNsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconNsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconNsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀNclock-controller@fdd00000,rockchip,rk3568-pmucruNclock-controller@fdd20000,rockchip,rk3568-cru xin24mG Ni2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c . - i2cpclkj tdefault okayregulator@1c ,tcs,tcs4525 vdd_cpu/CU 5m0!Nregulator-state-mempmic@20,rockchip,rk809 "Hmclk Htdefaultj#$%%%+%7%C%O%[%g%sNregulatorsDCDC_REG1  vdd_logic/C U mpqregulator-state-memDCDC_REG2 vdd_gpu/ U mpqNGregulator-state-memDCDC_REG3 vcc_ddr/Cregulator-state-memDCDC_REG4 vdd_npu U mpqregulator-state-memDCDC_REG5 vcc_1v8/CUw@mw@Nregulator-state-memLDO_REG1 vdda0v9_imageU m N[regulator-state-memLDO_REG2  vdda_0v9/CU m regulator-state-memLDO_REG3  vdda0v9_pmu/CU m regulator-state-mem LDO_REG4  vccio_acodec/U2Zm2ZNregulator-state-memLDO_REG5  vccio_sdUw@m2ZNregulator-state-memLDO_REG6  vcc3v3_pmu/CU2Zm2ZNregulator-state-mem2ZLDO_REG7  vcca_1v8/CUw@mw@Nregulator-state-memLDO_REG8  vcca1v8_pmu/CUw@mw@regulator-state-memw@LDO_REG9 vcca1v8_imageUw@mw@N\regulator-state-memSWITCH_REG1 vcc_3v3/CNregulator-state-memSWITCH_REG2  vcc3v3_sdNdregulator-state-memcodecserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t  ,baudclkapb_pclk&&j'tdefault  disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclkj(tdefault disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclkj)tdefault disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm   0 pwmpclkj*tdefault disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0  0 pwmpclkj+tdefault disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller  Npower-domain@7 4, power-domain@8  4-./ power-domain@9   4012 power-domain@10  4345678 power-domain@11  49 power-domain@13  4: power-domain@14  4;<= power-domain@15  4>?@ABCDE gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' ;jobmmugpu gpubus/FokayKGNvideo-codec@fdea0400,rockchip,rk3568-vpu   aclkhclkWH iommu@fdea0800,rockchip,rk3568-iommu@  aclkiface  ^NHvideo-codec@fdee0000,rockchip,rk3568-vepu @  aclkhclkWI iommu@fdee0800,rockchip,rk3568-iommu@ ?  aclkiface ^NImmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d  biuciuciu-driveciu-samplekvрreset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a ;macirqeth_wake_irq@ Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmacethJKLokaysY@outputM rgmii-idtdefaultjNOPQRmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22N  #SNMstmmac-axi-config/9INJrx-queues-configYNKqueue0tx-queues-configoNLqueue0vop@fe040000 0@vopgamma-lut ( %aclkhclkdclk_vp0dclk_vp1dclk_vp2WT okay,rockchip,rk3568-vopports Nport@0 endpoint@2UN]port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?   aclkiface^okayNTdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi D pclkhclk dphyV apb disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi E pclkhclk dphyW apb disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -( (iahbisfrcecreftdefault jXYZ okay[\Nports port@0endpoint]NUport@1endpoint^Nqos@fe128000,rockchip,rk3568-qossyscon N,qos@fe138080,rockchip,rk3568-qossyscon N;qos@fe138100,rockchip,rk3568-qossyscon N<qos@fe138180,rockchip,rk3568-qossyscon N=qos@fe148000,rockchip,rk3568-qossyscon N-qos@fe148080,rockchip,rk3568-qossyscon N.qos@fe148100,rockchip,rk3568-qossyscon N/qos@fe150000,rockchip,rk3568-qossyscon N9qos@fe158000,rockchip,rk3568-qossyscon N3qos@fe158100,rockchip,rk3568-qossyscon N4qos@fe158180,rockchip,rk3568-qossyscon N5qos@fe158200,rockchip,rk3568-qossyscon N6qos@fe158280,rockchip,rk3568-qossyscon N7qos@fe158300,rockchip,rk3568-qossyscon N8qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon N>qos@fe190280,rockchip,rk3568-qossyscon NBqos@fe190300,rockchip,rk3568-qossyscon NCqos@fe190380,rockchip,rk3568-qossyscon NDqos@fe190400,rockchip,rk3568-qossyscon NEqos@fe198000,rockchip,rk3568-qossyscon N:qos@fe1a8000,rockchip,rk3568-qossyscon N0qos@fe1a8080,rockchip,rk3568-qossyscon N1qos@fe1a8100,rockchip,rk3568-qossyscon N2pcie@fe260000,rockchip,rk3568-pcie0@&?dbiapbconfig<KJIHG;syspmcmsilegacyerr( $aclk_mstaclk_slvaclk_dbipclkauxpci`____ (0 pcie-phy8>>>pipe  disabledlegacy-interrupt-controller HN_mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b  biuciuciu-driveciu-samplekvрresetokay:D U"^tdefaultj`abciwdmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c  biuciuciu-driveciu-samplekvрreset disabledspi@fe300000 ,rockchip,sfc0@ e xvclk_sfchclk_sfcjetdefault disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 {} n6( |zy{}corebusaxiblocktimerokay:v tdefaultjfghispdif@fe460000,rockchip,rk3568-spdifF f mclkhclk _\jtxtdefaultjk disabledi2s@fe400000,rockchip,rk3568-i2s-tdm@ 4=AFqFq ?C9mclk_txmclk_rxhclkjtxPQ tx-mrx-mokayNi2s@fe410000,rockchip,rk3568-i2s-tdmA 5EIFqFq GK:mclk_txmclk_rxhclkjjrxtxRS tx-mrx-mtdefault0jlmnopqrstuvwokayNi2s@fe430000,rockchip,rk3568-i2s-tdmC 7 SW<mclk_txmclk_rxhclkjjtxrxUV tx-mrx-m disabledpdm@fe440000,rockchip,rk3568-pdmD L ZYpdm_clkpdm_hclkj rxjxyz{|}tdefaultXpdm-m disableddma-controller@fe530000,arm,pl330arm,primecellS@    apb_pclkN&dma-controller@fe550000,arm,pl330arm,primecellU@   apb_pclkNji2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ / HG i2cpclkj~tdefault okaygoodix@14,goodix,gt1151"  " tdefaultj #"i2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0 JI i2cpclkjtdefault  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1 LK i2cpclkjtdefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2 NM i2cpclkjtdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3 PO i2cpclkjtdefault  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`   tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia g RQspiclkapb_pclk&&txrxtdefault j  disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib h TSspiclkapb_pclk&&txrxtdefault j  disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic i VUspiclkapb_pclk&&txrxtdefault j  disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid j XWspiclkapb_pclk&&txrxtdefault j  disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte u baudclkapb_pclk&&jtdefault  disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v # baudclkapb_pclk&&jtdefault okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w '$baudclkapb_pclk&&jtdefault  disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x +(baudclkapb_pclk&& jtdefault  disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y /,baudclkapb_pclk& & jtdefault  disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z 30baudclkapb_pclk& & jtdefault  disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk { 74baudclkapb_pclk&&jtdefault  disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl | ;8baudclkapb_pclk&&jtdefault  disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm } ?<baudclkapb_pclk&&jtdefault  disabledthermal-zonescpu-thermal d  .tripscpu_alert0 >p JpassiveNcpu_alert1 >$ Jpassivecpu_crit >s J criticalcooling-mapsmap0 U0 Z gpu-thermal   .tripsgpu-threshold >p Jpassivegpu-target >$ JpassiveNgpu-crit >s J criticalcooling-mapsmap0 U Ztsadc@fe710000,rockchip,rk3568-tsadcq sf@ ` tsadcapb_pclk istinitdefaultsleepj   okay  Nsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ] saradcapb_pclk saradc-apb okay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkjtdefault disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkjtdefault disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn  ZY pwmpclkjtdefault disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0 ZY pwmpclkjtdefault disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkjtdefault disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkjtdefault disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo  ]\ pwmpclkjtdefault disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0 ]\ pwmpclkjtdefault disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkjtdefault disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkjtdefault disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp  `_ pwmpclkjtdefault disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0 `_ pwmpclkjtdefault disabledphy@fe830000,rockchip,rk3568-naneng-combphy "} refapbpipe"   "okayNphy@fe840000,rockchip,rk3568-naneng-combphy %~ refapbpipe%   " disabledNphy@fe870000,rockchip,rk3568-csi-dphy ypclk "apb disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclk z " apb disabledNVmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk { " apb disabledNWusb2phy@fe8a0000,rockchip,rk3568-usb2phy phyclkWclk_usbphy0_480m  -okayNhost-port "okay =Notg-port "okay =Nusb2phy@fe8b0000,rockchip,rk3568-usb2phy phyclkWclk_usbphy1_480m  -okayhost-port "okay =Notg-port "okay =Npinctrl,rockchip,rk3568-pinctrl H gpio@fdd60000,rockchip,gpio-bank ! .  U eN"gpio@fe740000,rockchip,gpio-bankt " cd U egpio@fe750000,rockchip,gpio-banku # ef U eNSgpio@fe760000,rockchip,gpio-bankv $ gh U egpio@fe770000,rockchip,gpio-bankw % ij U epcfg-pull-up qNpcfg-pull-none ~Npcfg-pull-none-drv-level-1 ~ Npcfg-pull-none-drv-level-2 ~ Npcfg-pull-none-drv-level-3 ~ Npcfg-pull-up-drv-level-1 q Npcfg-pull-up-drv-level-2 q Npcfg-pull-none-smt ~ Nacodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 N cpuebcedpdpemmcemmc-bus8   Nfemmc-clk Ngemmc-cmd Nhemmc-datastrobe Nieth0eth1flashfspifspi-pins` Negmac0gmac0-miim Ngmac0-rx-bus20 Ngmac0-tx-bus20    Ngmac0-rgmii-clk Ngmac0-rgmii-bus@ Ngmac1gmac1m1-miim NNgmac1m1-rx-bus20  NPgmac1m1-tx-bus20 NOgmac1m1-rgmii-clk NQgmac1m1-rgmii-bus@ NRgpuhdmitxhdmitxm0-cec NZhdmitx-scl NXhdmitx-sda NYi2c0i2c0-xfer  N i2c1i2c1-xfer  N~i2c2i2c2m0-xfer Ni2c3i2c3m0-xfer Ni2c4i2c4m0-xfer   Ni2c5i2c5m0-xfer   Ni2s1i2s1m0-lrckrx Noi2s1m0-lrcktx Nni2s1m0-mclk N$i2s1m0-sclkrx Nmi2s1m0-sclktx Nli2s1m0-sdi0  Npi2s1m0-sdi1  Nqi2s1m0-sdi2  Nri2s1m0-sdi3 Nsi2s1m0-sdo0 Nti2s1m0-sdo1 Nui2s1m0-sdo2  Nvi2s1m0-sdo3  Nwi2s2i2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk Nxpdmm0-clk1 Nypdmm0-sdi0  Nzpdmm0-sdi1  N{pdmm0-sdi2  N|pdmm0-sdi3 N}pmicpmic_int N#pmupwm0pwm0m0-pins N(pwm1pwm1m0-pins N)pwm2pwm2m0-pins N*pwm3pwm3-pins N+pwm4pwm4-pins Npwm5pwm5-pins Npwm6pwm6-pins Npwm7pwm7-pins Npwm8pwm8m0-pins  Npwm9pwm9m0-pins  Npwm10pwm10m0-pins  Npwm11pwm11m0-pins Npwm12pwm12m0-pins Npwm13pwm13m0-pins Npwm14pwm14m0-pins Npwm15pwm15m0-pins Nrefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ N`sdmmc0-clk Nasdmmc0-cmd Nbsdmmc0-det Ncsdmmc1sdmmc2spdifspdifm0-tx Nkspi0spi0m0-pins0 Nspi0m0-cs0 Nspi0m0-cs1 Nspi1spi1m0-pins0  Nspi1m0-cs0 Nspi1m0-cs1 Nspi2spi2m0-pins0 Nspi2m0-cs0 Nspi2m0-cs1 Nspi3spi3m0-pins0   Nspi3m0-cs0 Nspi3m0-cs1 Ntsadctsadc-shutorg Ntsadc-pin Nuart0uart0-xfer N'uart1uart1m0-xfer   Nuart2uart2m0-xfer Nuart3uart3m0-xfer Nuart4uart4m0-xfer Nuart5uart5m0-xfer Nuart6uart6m0-xfer Nuart7uart7m0-xfer Nuart8uart8m0-xfer Nuart9uart9m0-xfer Nvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2displayvcc3v3_lcd0_n_en Nvcc3v3_lcd1_n_en Nledsled_work_en Ntouchscreentouch_int Ntouch_rst Nusbvcc5v0_usb_host_en Nvcc5v0_usb_otg_en Nsata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob ^ sata-phy disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconNqos@fe190080,rockchip,rk3568-qossyscon N?qos@fe190100,rockchip,rk3568-qossyscon N@qos@fe190200,rockchip,rk3568-qossyscon NAsyscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀNphy@fe8c0000,rockchip,rk3568-pcie3-phy " &'wrefclk_mrefclk_npclkphy  disabledNpcie@fe270000,rockchip,rk3568-pcie ( $aclk_mstaclk_slvaclk_dbipclkauxpci<;syspmcmsglegacyerr` (0 pcie-phy0@@'8>~@>dbiapbconfigpipe disabledlegacy-interrupt-controller Npcie@fe280000,rockchip,rk3568-pcie ( $aclk_mstaclk_slvaclk_dbipclkauxpci<;syspmcmsglegacyerr` ( 0 pcie-phy0@(8>>dbiapbconfigpipe disabledlegacy-interrupt-controller Nethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*;macirqeth_wake_irq@ Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmacethokaysY@output rgmii-idtdefaultjmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22N  #SNstmmac-axi-config/9INrx-queues-configYNqueue0tx-queues-configoNqueue0phy@fe820000,rockchip,rk3568-naneng-combphy | refapbpipe   "okayNchosen serial2:1500000n8dc-12v,regulator-fixed dc_12v/CUmNhdmi-con,hdmi-connectoraportendpointN^leds ,gpio-ledsled-0 )" heartbeat  heartbeattdefaultjrk809-sound,simple-audio-cardi2s Analog RK809simple-audio-card,cpusimple-audio-card,codecvcc3v3-sys,regulator-fixed  vcc3v3_sys/CU2Zm2ZN%vcc5v0-sys,regulator-fixed  vcc5v0_sys/CULK@mLK@N!vcc5v0-usb,regulator-fixed  vcc5v0_usb/CULK@mLK@Nvcc5v0-usb-host,regulator-fixed  "tdefaultj vcc5v0_usb_hostULK@mLK@Nvcc5v0-usb-otg,regulator-fixed  "tdefaultj vcc5v0_usb_otgULK@mLK@Nvcc3v3-lcd0-n,regulator-fixed vcc3v3_lcd0_nU2Zm2Z  "%tdefaultjNregulator-state-memvcc3v3-lcd1-n,regulator-fixed vcc3v3_lcd1_nU2Zm2Z  "%tdefaultjregulator-state-mem interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0ethernet1mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2cpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendassigned-clock-parentsrockchip,system-power-controller#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-init-microvoltregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltmic-in-differentialdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsfifo-depthmax-frequencyreset-namessnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modereset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplybus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplynon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsAVDD28-supplyirq-gpiosVDDIO-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplyrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfstdout-pathfunctioncolorlinux,default-triggerenable-active-highgpio