BJ8=(:<MikroTik RB3011UiAS-RM!mikrotik,rb3011,cpuscpu@0 !qcom,krait=qcom,kpss-acc-v1KcpuW[lucpu@1 !qcom,krait=qcom,kpss-acc-v1KcpuW[lul2-cache!cache~memoryKmemoryWcpu-pmu!qcom,krait-pmu  reserved-memorynss@40000000W@smem@41000000WA clockscxo_board !fixed-clock}x@pxo_board !fixed-clock}x@sleep_clk !fixed-clock firmwarescm!qcom,scm-ipq806xqcom,scmsoc !simple-buslpass@28100000!qcom,lpass-cpu disabled $ahbix-clkmi2s-osr-clkmi2s-bit-clk Ulpass-irq-lpaifW( lpass-lpaifpinmux@800000!qcom,ipq8064-pinctrlW@ E$9 pcie0_pinmuxmuxJgpio3 Opcie1_rstX gpcie1_pinmuxmuxJgpio48 Opcie2_rstX gpcie2_pinmuxmuxJgpio63 Opcie3_rstX gspi_pins muxJgpio18gpio19gpio21Ogsbi5X tleds_pinsmuxJgpio33OgpioX~gbuttons_pinsmuxJgpio66Xgmdio0_pinsmux Jgpio0gpio1OgpioXgmdio1_pinsmuxJgpio10gpio11OgpioXgsw0_reset_pinmuxJgpio16XOgpiogsw1_reset_pinmuxJgpio17XOgpioginterrupt-controller@2000000!qcom,msm-qgic2$9W timer@200a0005!qcom,kpss-timerqcom,kpss-wdt-ipq8064qcom,msm-timer<W}x@ sleepclock-controller@2088000!qcom,kpss-acc-v1Wclock-controller@2098000!qcom,kpss-acc-v1W regulator@2089000 !qcom,saw2Wregulator@2099000 !qcom,saw2W gsbi@12480000!qcom,gsbi-v1.0.0WH iface disabled serial@12490000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmWIH   coreiface disabledi2c@124a0000!qcom,i2c-qup-v1.1.1WJ   coreiface disabledgsbi@16300000!qcom,gsbi-v1.0.0W0 iface disabled serial@16340000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmW40   coreiface disabledi2c@16380000!qcom,i2c-qup-v1.1.1W8   coreiface disabledgsbi@1a200000!qcom,gsbi-v1.0.0W  ifaceokay serial@1a240000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmW$    coreiface disabledi2c@1a280000!qcom,i2c-qup-v1.1.1W(   coreiface disabledspi@1a280000!qcom,spi-qup-v1.1.1W(   coreifaceokay default s25fl016k@0!jedec,spi-norWpartition@0 RouterBootWgsbi@16600000okay!qcom,gsbi-v1.0.0W` iface serial@16640000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmWd`   coreifaceokaysata-phy@1b400000!qcom,ipq806x-sata-phyW@ cfg" disabled sata@29000000!qcom,ipq806x-ahcigeneric-ahciW) ( 2 $slave_faceifacecorerxoobpmalive- =R  Wsata-phy disabledqcom,ssbi@500000 !qcom,ssbiWP apmic-arbiterqfprom@700000 !qcom,qfpromWpclock-controller@900000!qcom,gcc-ipq8064W@v syscon@1a400000!qcom,tcsr-ipq8064sysconW@ clock-controller@28000000!qcom,lcc-ipq8064W(vpci@1b500000!qcom,pcie-ipq8064 WPP `dbielbiparfconfigKpci0 #msi9$%&'( ) + , * coreifacephyauxref- =0      axiahbporpciphyextdefault disabled pci@1b700000!qcom,pcie-ipq8064 Wpp 1dbielbiparfconfigKpci011.. 9msi9:;<=( coreifacephyauxref- =0 [ Z Y X W Vaxiahbporpciphyextdefault disabled 0pci@1b900000!qcom,pcie-ipq8064 W 5dbielbiparfconfigKpci05522 Gmsi9HIJK(    coreifacephyauxref- =0 c b a ` _ ^axiahbporpciphyextdefault disabled ?syscon@03000000!sysconWsyscon@1bb00000!sysconWstmmac-axi-configethernet@37000000Knetwork!qcom,ipq806x-gmacW7  macirq! *3C  stmmaceth { stmmacethokaySrgmii\dfixed-linkouethernet@37200000Knetwork!qcom,ipq806x-gmacW7  macirq! *3C  stmmaceth | stmmaceth disabledethernet@37400000Knetwork!qcom,ipq806x-gmacW7@  macirq! *3C  stmmaceth } stmmaceth disabledethernet@37600000Knetwork!qcom,ipq806x-gmacW7`  macirq! *3C  stmmaceth ~ stmmacethokaySsgmii\d fixed-linkouvsdcc-regulator!regulator-fixed SDCC Power2Z2Zdma@12402000!qcom,bam-v1.3.0W@  b bbam_clkdma@12182000!qcom,bam-v1.3.0W  ` dbam_clkamba !simple-bussdcc@12400000 disabled!arm,pl18xarm,primecellW@  hcmd_irq g bmclkapb_pclk'9FRWtxrxsdcc@12180000!arm,pl18xarm,primecell disabledW  fcmd_irq k dmclkapb_pclk' qao}RWtxrxgpio_keys !gpio-keysdefaultbutton@1reset B<leds !gpio-ledsdefaultled@7rb3011:green:user !offaliases#/soc/gsbi@16600000/serial@16640000/soc/ethernet@37000000/soc/ethernet@37600000/mdio@0/mdio@1chosen"loglevel=8 console=ttyMSM0,115200serial0:115200n8memory@0WB>Kmemorymdio@0okay!virtual,mdio-gpiodefaultswitch@10 !qca,qca8337default %Wportsport@0Wcpu1 Srgmii-idfixed-linkouport@1Wsw1port@2Wsw2port@3Wsw3port@4Wsw4port@5Wsw5mdio@1okay!virtual,mdio-gpio  defaultswitch@14 !qca,qca8337default %Wportsport@0Wcpu1 Ssgmiifixed-linkouport@1Wsw6port@2Wsw7port@3Wsw8port@4Wsw9port@5Wsw10 #address-cells#size-cellsmodelcompatibleinterrupt-parentenable-methoddevice_typeregnext-level-cacheqcom,accqcom,sawcache-levelphandleinterruptsrangesno-map#clock-cellsclock-frequencystatusclocksclock-namesinterrupt-namesreg-namesgpio-controllergpio-ranges#gpio-cellsinterrupt-controller#interrupt-cellspinsfunctiondrive-strengthbias-disablebias-nonebias-pull-downoutput-lowbias-pull-upinput-disablecpu-offsetregulatorcell-indexsyscon-tcsrqcom,modespi-max-frequencypinctrl-0pinctrl-namescs-gpioslabel#phy-cellsassigned-clocksassigned-clock-ratesphysphy-namesqcom,controller-type#reset-cellslinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapresetsreset-namesperst-gpiosnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blensnps,axi-configsnps,pblsnps,aalqcom,nss-commonqcom,qsgmii-csrphy-modeqcom,idphy-handlespeedfull-duplexregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-on#dma-cellsqcom,eearm,primecell-periphidbus-widthnon-removablecap-sd-highspeedcap-mmc-highspeedmmc-ddr-1_8vvmmc-supplydmasdma-names#mmc-ddr-1_8vsd-uhs-sdr104sd-uhs-ddr50vqmmc-supplylinux,codelinux,input-typedebounce-intervaldefault-stateserial0ethernet0ethernet1mdio-gpio0mdio-gpio1bootargsstdout-pathdsa,memberreset-gpiosethernet